1; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s 2; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s 3 4; GCN-LABEL: {{^}}main: 5; GCN: v_cvt_pkrtz_f16_f32 6; GCN: v_cvt_pkrtz_f16_f32 7; GCN-NOT: v_cvt_pkrtz_f16_f32 8 9define amdgpu_ps void @main(float %src) { 10main_body: 11 %p1 = call i32 @llvm.SI.packf16(float undef, float %src) 12 %p2 = call i32 @llvm.SI.packf16(float %src, float undef) 13 %p3 = call i32 @llvm.SI.packf16(float undef, float undef) 14 %f1 = bitcast i32 %p1 to float 15 %f2 = bitcast i32 %p2 to float 16 %f3 = bitcast i32 %p3 to float 17 call void @llvm.SI.export(i32 15, i32 1, i32 0, i32 0, i32 1, float undef, float %f1, float undef, float %f1) 18 call void @llvm.SI.export(i32 15, i32 1, i32 0, i32 0, i32 1, float undef, float %f2, float undef, float %f2) 19 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float undef, float %f3, float undef, float %f2) 20 ret void 21} 22 23; Function Attrs: nounwind readnone 24declare i32 @llvm.SI.packf16(float, float) #0 25 26declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) 27 28attributes #0 = { nounwind readnone } 29