1; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 2; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 3 4; XXX - Why the packing? 5; FUNC-LABEL: {{^}}scalar_to_vector_v2i32: 6; SI: buffer_load_dword [[VAL:v[0-9]+]], 7; SI: v_lshrrev_b32_e32 [[SHR:v[0-9]+]], 16, [[VAL]] 8; SI: v_lshlrev_b32_e32 [[SHL:v[0-9]+]], 16, [[SHR]] 9; SI: v_or_b32_e32 v[[OR:[0-9]+]], [[SHL]], [[SHR]] 10; SI: v_mov_b32_e32 v[[COPY:[0-9]+]], v[[OR]] 11; SI: buffer_store_dwordx2 v{{\[}}[[OR]]:[[COPY]]{{\]}} 12define void @scalar_to_vector_v2i32(<4 x i16> addrspace(1)* %out, i32 addrspace(1)* %in) nounwind { 13 %tmp1 = load i32, i32 addrspace(1)* %in, align 4 14 %bc = bitcast i32 %tmp1 to <2 x i16> 15 %tmp2 = shufflevector <2 x i16> %bc, <2 x i16> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> 16 store <4 x i16> %tmp2, <4 x i16> addrspace(1)* %out, align 8 17 ret void 18} 19 20; FUNC-LABEL: {{^}}scalar_to_vector_v2f32: 21; SI: buffer_load_dword [[VAL:v[0-9]+]], 22; SI: v_lshrrev_b32_e32 [[RESULT:v[0-9]+]], 16, [[VAL]] 23; SI: buffer_store_dwordx2 24define void @scalar_to_vector_v2f32(<4 x i16> addrspace(1)* %out, float addrspace(1)* %in) nounwind { 25 %tmp1 = load float, float addrspace(1)* %in, align 4 26 %bc = bitcast float %tmp1 to <2 x i16> 27 %tmp2 = shufflevector <2 x i16> %bc, <2 x i16> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> 28 store <4 x i16> %tmp2, <4 x i16> addrspace(1)* %out, align 8 29 ret void 30} 31 32; Getting a SCALAR_TO_VECTOR seems to be tricky. These cases managed 33; to produce one, but for some reason never made it to selection. 34 35 36; define void @scalar_to_vector_test2(<8 x i8> addrspace(1)* %out, i32 addrspace(1)* %in) nounwind { 37; %tmp1 = load i32, i32 addrspace(1)* %in, align 4 38; %bc = bitcast i32 %tmp1 to <4 x i8> 39 40; %tmp2 = shufflevector <4 x i8> %bc, <4 x i8> undef, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1> 41; store <8 x i8> %tmp2, <8 x i8> addrspace(1)* %out, align 4 42; ret void 43; } 44 45; define void @scalar_to_vector_test3(<4 x i32> addrspace(1)* %out) nounwind { 46; %newvec0 = insertelement <2 x i64> undef, i64 12345, i32 0 47; %newvec1 = insertelement <2 x i64> %newvec0, i64 undef, i32 1 48; %bc = bitcast <2 x i64> %newvec1 to <4 x i32> 49; %add = add <4 x i32> %bc, <i32 1, i32 2, i32 3, i32 4> 50; store <4 x i32> %add, <4 x i32> addrspace(1)* %out, align 16 51; ret void 52; } 53 54; define void @scalar_to_vector_test4(<8 x i16> addrspace(1)* %out) nounwind { 55; %newvec0 = insertelement <4 x i32> undef, i32 12345, i32 0 56; %bc = bitcast <4 x i32> %newvec0 to <8 x i16> 57; %add = add <8 x i16> %bc, <i16 1, i16 2, i16 3, i16 4, i16 1, i16 2, i16 3, i16 4> 58; store <8 x i16> %add, <8 x i16> addrspace(1)* %out, align 16 59; ret void 60; } 61 62; define void @scalar_to_vector_test5(<4 x i16> addrspace(1)* %out) nounwind { 63; %newvec0 = insertelement <2 x i32> undef, i32 12345, i32 0 64; %bc = bitcast <2 x i32> %newvec0 to <4 x i16> 65; %add = add <4 x i16> %bc, <i16 1, i16 2, i16 3, i16 4> 66; store <4 x i16> %add, <4 x i16> addrspace(1)* %out, align 16 67; ret void 68; } 69 70; define void @scalar_to_vector_test6(<4 x i16> addrspace(1)* %out) nounwind { 71; %newvec0 = insertelement <2 x i32> undef, i32 12345, i32 0 72; %bc = bitcast <2 x i32> %newvec0 to <4 x i16> 73; %add = add <4 x i16> %bc, <i16 1, i16 2, i16 3, i16 4> 74; store <4 x i16> %add, <4 x i16> addrspace(1)* %out, align 16 75; ret void 76; } 77