1 #if !defined (__SI_GB_REG_H__) 2 #define __SI_GB_REG_H__ 3 4 /* 5 * Copyright © 2014 Advanced Micro Devices, Inc. 6 * All Rights Reserved. 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining 9 * a copy of this software and associated documentation files (the 10 * "Software"), to deal in the Software without restriction, including 11 * without limitation the rights to use, copy, modify, merge, publish, 12 * distribute, sub license, and/or sell copies of the Software, and to 13 * permit persons to whom the Software is furnished to do so, subject to 14 * the following conditions: 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 18 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 19 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS 20 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 22 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 23 * USE OR OTHER DEALINGS IN THE SOFTWARE. 24 * 25 * The above copyright notice and this permission notice (including the 26 * next paragraph) shall be included in all copies or substantial portions 27 * of the Software. 28 */ 29 30 // 31 // Make sure the necessary endian defines are there. 32 // 33 #if defined(LITTLEENDIAN_CPU) 34 #elif defined(BIGENDIAN_CPU) 35 #else 36 #error "BIGENDIAN_CPU or LITTLEENDIAN_CPU must be defined" 37 #endif 38 39 /* 40 * GB_ADDR_CONFIG struct 41 */ 42 43 #if defined(LITTLEENDIAN_CPU) 44 45 typedef struct _GB_ADDR_CONFIG_T { 46 unsigned int num_pipes : 3; 47 unsigned int : 1; 48 unsigned int pipe_interleave_size : 3; 49 unsigned int : 1; 50 unsigned int bank_interleave_size : 3; 51 unsigned int : 1; 52 unsigned int num_shader_engines : 2; 53 unsigned int : 2; 54 unsigned int shader_engine_tile_size : 3; 55 unsigned int : 1; 56 unsigned int num_gpus : 3; 57 unsigned int : 1; 58 unsigned int multi_gpu_tile_size : 2; 59 unsigned int : 2; 60 unsigned int row_size : 2; 61 unsigned int num_lower_pipes : 1; 62 unsigned int : 1; 63 } GB_ADDR_CONFIG_T; 64 65 #elif defined(BIGENDIAN_CPU) 66 67 typedef struct _GB_ADDR_CONFIG_T { 68 unsigned int : 1; 69 unsigned int num_lower_pipes : 1; 70 unsigned int row_size : 2; 71 unsigned int : 2; 72 unsigned int multi_gpu_tile_size : 2; 73 unsigned int : 1; 74 unsigned int num_gpus : 3; 75 unsigned int : 1; 76 unsigned int shader_engine_tile_size : 3; 77 unsigned int : 2; 78 unsigned int num_shader_engines : 2; 79 unsigned int : 1; 80 unsigned int bank_interleave_size : 3; 81 unsigned int : 1; 82 unsigned int pipe_interleave_size : 3; 83 unsigned int : 1; 84 unsigned int num_pipes : 3; 85 } GB_ADDR_CONFIG_T; 86 87 #endif 88 89 typedef union { 90 unsigned int val : 32; 91 GB_ADDR_CONFIG_T f; 92 } GB_ADDR_CONFIG; 93 94 #if defined(LITTLEENDIAN_CPU) 95 96 typedef struct _GB_TILE_MODE_T { 97 unsigned int micro_tile_mode : 2; 98 unsigned int array_mode : 4; 99 unsigned int pipe_config : 5; 100 unsigned int tile_split : 3; 101 unsigned int bank_width : 2; 102 unsigned int bank_height : 2; 103 unsigned int macro_tile_aspect : 2; 104 unsigned int num_banks : 2; 105 unsigned int micro_tile_mode_new : 3; 106 unsigned int sample_split : 2; 107 unsigned int : 5; 108 } GB_TILE_MODE_T; 109 110 typedef struct _GB_MACROTILE_MODE_T { 111 unsigned int bank_width : 2; 112 unsigned int bank_height : 2; 113 unsigned int macro_tile_aspect : 2; 114 unsigned int num_banks : 2; 115 unsigned int : 24; 116 } GB_MACROTILE_MODE_T; 117 118 #elif defined(BIGENDIAN_CPU) 119 120 typedef struct _GB_TILE_MODE_T { 121 unsigned int : 5; 122 unsigned int sample_split : 2; 123 unsigned int micro_tile_mode_new : 3; 124 unsigned int num_banks : 2; 125 unsigned int macro_tile_aspect : 2; 126 unsigned int bank_height : 2; 127 unsigned int bank_width : 2; 128 unsigned int tile_split : 3; 129 unsigned int pipe_config : 5; 130 unsigned int array_mode : 4; 131 unsigned int micro_tile_mode : 2; 132 } GB_TILE_MODE_T; 133 134 typedef struct _GB_MACROTILE_MODE_T { 135 unsigned int : 24; 136 unsigned int num_banks : 2; 137 unsigned int macro_tile_aspect : 2; 138 unsigned int bank_height : 2; 139 unsigned int bank_width : 2; 140 } GB_MACROTILE_MODE_T; 141 142 #endif 143 144 typedef union { 145 unsigned int val : 32; 146 GB_TILE_MODE_T f; 147 } GB_TILE_MODE; 148 149 typedef union { 150 unsigned int val : 32; 151 GB_MACROTILE_MODE_T f; 152 } GB_MACROTILE_MODE; 153 154 #endif 155 156