Home
last modified time | relevance | path

Searched refs:AsArm (Results 1 – 6 of 6) sorted by relevance

/art/compiler/utils/arm/
Djni_macro_assembler_arm_vixl.cc62 CHECK(r0.Is(method_reg.AsArm().AsVIXLRegister())); in BuildFrame()
68 if (reg.AsArm().IsCoreRegister()) { in BuildFrame()
69 core_spill_mask |= 1 << reg.AsArm().AsCoreRegister(); in BuildFrame()
71 fp_spill_mask |= 1 << reg.AsArm().AsSRegister(); in BuildFrame()
100 ArmManagedRegister reg = entry_spills.at(i).AsArm(); in BuildFrame()
127 if (reg.AsArm().IsCoreRegister()) { in RemoveFrame()
128 core_spill_mask |= 1 << reg.AsArm().AsCoreRegister(); in RemoveFrame()
130 fp_spill_mask |= 1 << reg.AsArm().AsSRegister(); in RemoveFrame()
179 ArmManagedRegister src = m_src.AsArm(); in Store()
202 ArmManagedRegister src = msrc.AsArm(); in StoreRef()
[all …]
Djni_macro_assembler_arm_vixl.h236 vixl32::Label* AsArm() { in AsArm() function
Dmanaged_register_arm.h296 constexpr inline arm::ArmManagedRegister ManagedRegister::AsArm() const { in AsArm() function
Dmanaged_register_arm_test.cc25 ArmManagedRegister reg = ManagedRegister::NoRegister().AsArm(); in TEST()
/art/compiler/jni/quick/arm/
Dcalling_convention_arm.cc96 if (r.AsArm().IsCoreRegister()) { in CalculateCoreCalleeSpillMask()
97 result |= (1 << r.AsArm().AsCoreRegister()); in CalculateCoreCalleeSpillMask()
106 if (r.AsArm().IsSRegister()) { in CalculateFpCalleeSpillMask()
107 result |= (1 << r.AsArm().AsSRegister()); in CalculateFpCalleeSpillMask()
/art/compiler/utils/
Dmanaged_register.h57 constexpr arm::ArmManagedRegister AsArm() const;