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Searched refs:Out (Results 1 – 25 of 31) sorted by relevance

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/art/compiler/optimizing/
Dcode_generator_vector_x86.cc54 XmmRegister reg = locations->Out().AsFpuRegister<XmmRegister>(); in VisitVecReplicateScalar()
86 DCHECK(locations->InAt(0).Equals(locations->Out())); in VisitVecReplicateScalar()
91 DCHECK(locations->InAt(0).Equals(locations->Out())); in VisitVecReplicateScalar()
145 XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>(); in VisitVecCnv()
163 XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>(); in VisitVecNeg()
213 XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>(); in VisitVecAbs()
254 XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>(); in VisitVecNot()
319 DCHECK(locations->InAt(0).Equals(locations->Out())); in VisitVecAdd()
321 XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>(); in VisitVecAdd()
360 DCHECK(locations->InAt(0).Equals(locations->Out())); in VisitVecHalvingAdd()
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Dcode_generator_vector_x86_64.cc51 XmmRegister reg = locations->Out().AsFpuRegister<XmmRegister>(); in VisitVecReplicateScalar()
79 DCHECK(locations->InAt(0).Equals(locations->Out())); in VisitVecReplicateScalar()
84 DCHECK(locations->InAt(0).Equals(locations->Out())); in VisitVecReplicateScalar()
138 XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>(); in VisitVecCnv()
156 XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>(); in VisitVecNeg()
206 XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>(); in VisitVecAbs()
247 XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>(); in VisitVecNot()
312 DCHECK(locations->InAt(0).Equals(locations->Out())); in VisitVecAdd()
314 XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>(); in VisitVecAdd()
353 DCHECK(locations->InAt(0).Equals(locations->Out())); in VisitVecHalvingAdd()
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Dcode_generator_vector_mips64.cc56 VectorRegister dst = VectorRegisterFrom(locations->Out()); in VisitVecReplicateScalar()
146 VectorRegister dst = VectorRegisterFrom(locations->Out()); in VisitVecCnv()
165 VectorRegister dst = VectorRegisterFrom(locations->Out()); in VisitVecNeg()
211 VectorRegister dst = VectorRegisterFrom(locations->Out()); in VisitVecAbs()
259 VectorRegister dst = VectorRegisterFrom(locations->Out()); in VisitVecNot()
313 VectorRegister dst = VectorRegisterFrom(locations->Out()); in VisitVecAdd()
354 VectorRegister dst = VectorRegisterFrom(locations->Out()); in VisitVecHalvingAdd()
395 VectorRegister dst = VectorRegisterFrom(locations->Out()); in VisitVecSub()
436 VectorRegister dst = VectorRegisterFrom(locations->Out()); in VisitVecMul()
477 VectorRegister dst = VectorRegisterFrom(locations->Out()); in VisitVecDiv()
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Dcode_generator_vector_mips.cc51 VectorRegister dst = VectorRegisterFrom(locations->Out()); in VisitVecReplicateScalar()
143 VectorRegister dst = VectorRegisterFrom(locations->Out()); in VisitVecCnv()
161 VectorRegister dst = VectorRegisterFrom(locations->Out()); in VisitVecNeg()
207 VectorRegister dst = VectorRegisterFrom(locations->Out()); in VisitVecAbs()
255 VectorRegister dst = VectorRegisterFrom(locations->Out()); in VisitVecNot()
309 VectorRegister dst = VectorRegisterFrom(locations->Out()); in VisitVecAdd()
350 VectorRegister dst = VectorRegisterFrom(locations->Out()); in VisitVecHalvingAdd()
391 VectorRegister dst = VectorRegisterFrom(locations->Out()); in VisitVecSub()
432 VectorRegister dst = VectorRegisterFrom(locations->Out()); in VisitVecMul()
473 VectorRegister dst = VectorRegisterFrom(locations->Out()); in VisitVecDiv()
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Dcode_generator_vector_arm_vixl.cc54 vixl32::DRegister dst = DRegisterFrom(locations->Out()); in VisitVecReplicateScalar()
130 vixl32::DRegister dst = DRegisterFrom(locations->Out()); in VisitVecNeg()
158 vixl32::DRegister dst = DRegisterFrom(locations->Out()); in VisitVecAbs()
186 vixl32::DRegister dst = DRegisterFrom(locations->Out()); in VisitVecNot()
232 vixl32::DRegister dst = DRegisterFrom(locations->Out()); in VisitVecAdd()
261 vixl32::DRegister dst = DRegisterFrom(locations->Out()); in VisitVecHalvingAdd()
302 vixl32::DRegister dst = DRegisterFrom(locations->Out()); in VisitVecSub()
331 vixl32::DRegister dst = DRegisterFrom(locations->Out()); in VisitVecMul()
368 vixl32::DRegister dst = DRegisterFrom(locations->Out()); in VisitVecMin()
409 vixl32::DRegister dst = DRegisterFrom(locations->Out()); in VisitVecMax()
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Dcode_generator_vector_arm64.cc70 VRegister dst = VRegisterFrom(locations->Out()); in VisitVecReplicateScalar()
177 VRegister dst = VRegisterFrom(locations->Out()); in VisitVecCnv()
195 VRegister dst = VRegisterFrom(locations->Out()); in VisitVecNeg()
235 VRegister dst = VRegisterFrom(locations->Out()); in VisitVecAbs()
274 VRegister dst = VRegisterFrom(locations->Out()); in VisitVecNot()
324 VRegister dst = VRegisterFrom(locations->Out()); in VisitVecAdd()
365 VRegister dst = VRegisterFrom(locations->Out()); in VisitVecHalvingAdd()
406 VRegister dst = VRegisterFrom(locations->Out()); in VisitVecSub()
447 VRegister dst = VRegisterFrom(locations->Out()); in VisitVecMul()
484 VRegister dst = VRegisterFrom(locations->Out()); in VisitVecDiv()
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Dintrinsics_mips.cc123 Location out = invoke_->GetLocations()->Out(); in EmitNativeCode()
165 Register out_lo = locations->Out().AsRegisterPairLow<Register>(); in MoveFPToInt()
166 Register out_hi = locations->Out().AsRegisterPairHigh<Register>(); in MoveFPToInt()
171 Register out = locations->Out().AsRegister<Register>(); in MoveFPToInt()
204 FRegister out = locations->Out().AsFpuRegister<FRegister>(); in MoveIntToFP()
260 Register out = locations->Out().AsRegister<Register>(); in GenReverse()
274 Register out = locations->Out().AsRegister<Register>(); in GenReverse()
320 Register out_lo = locations->Out().AsRegisterPairLow<Register>(); in GenReverse()
321 Register out_hi = locations->Out().AsRegisterPairHigh<Register>(); in GenReverse()
447 Register out = locations->Out().AsRegister<Register>(); in GenNumberOfLeadingZeroes()
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Dssa_liveness_analysis.cc55 if (locations != nullptr && locations->Out().IsValid()) { in NumberInstructions()
73 if (locations != nullptr && locations->Out().IsValid()) { in NumberInstructions()
113 bool has_out_location = input->GetLocations()->Out().IsValid(); in RecursivelyProcessInputs()
213 DCHECK(!current->GetLocations()->Out().IsValid()); in ComputeLiveRanges()
438 Location out = locations->Out(); in FindHintAtDefinition()
503 return defined_by->GetLocations()->Out(); in ToLocation()
Dintrinsics_mips64.cc112 Location out = invoke_->GetLocations()->Out(); in EmitNativeCode()
152 GpuRegister out = locations->Out().AsRegister<GpuRegister>(); in MoveFPToInt()
189 FpuRegister out = locations->Out().AsFpuRegister<FpuRegister>(); in MoveIntToFP()
228 GpuRegister out = locations->Out().AsRegister<GpuRegister>(); in GenReverseBytes()
280 GpuRegister out = locations->Out().AsRegister<GpuRegister>(); in GenNumberOfLeadingZeroes()
311 Location out = locations->Out(); in GenNumberOfTrailingZeroes()
350 GpuRegister out = locations->Out().AsRegister<GpuRegister>(); in GenReverse()
392 GpuRegister out = locations->Out().AsRegister<GpuRegister>(); in GenBitCount()
477 FpuRegister out = locations->Out().AsFpuRegister<FpuRegister>(); in MathAbsFP()
514 GpuRegister out = locations->Out().AsRegister<GpuRegister>(); in GenAbsInteger()
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Dintrinsics_utils.h65 Location out = invoke_->GetLocations()->Out(); in EmitNativeCode()
Dintrinsics_arm64.cc136 Location out = invoke_->GetLocations()->Out(); in EmitNativeCode()
256 Location output = locations->Out(); in MoveFPToInt()
263 Location output = locations->Out(); in MoveIntToFP()
308 Location out = locations->Out(); in GenReverseBytes()
364 Location out = locations->Out(); in GenNumberOfLeadingZeros()
391 Location out = locations->Out(); in GenNumberOfTrailingZeros()
419 Location out = locations->Out(); in GenReverse()
448 Register dst = RegisterFrom(instr->GetLocations()->Out(), type); in GenBitCount()
483 Location out = locations->Out(); in MathAbsFP()
519 Location output = locations->Out(); in GenAbsInteger()
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Dcommon_arm.h99 return SRegisterFrom(instr->GetLocations()->Out()); in OutputSRegister()
105 return DRegisterFrom(instr->GetLocations()->Out()); in OutputDRegister()
145 return RegisterFrom(instr->GetLocations()->Out(), instr->GetType()); in OutputRegister()
Dintrinsics_x86_64.cc148 Location output = locations->Out(); in MoveFPToInt()
154 Location output = locations->Out(); in MoveIntToFP()
197 CpuRegister out = locations->Out().AsRegister<CpuRegister>(); in GenReverseBytes()
259 Location output = locations->Out(); in MathAbsFP()
302 Location output = locations->Out(); in GenAbsInteger()
346 Location out_loc = locations->Out(); in GenMinMaxFP()
480 DCHECK(locations->Out().Equals(op1_loc)); in GenMinMax()
484 CpuRegister out = locations->Out().AsRegister<CpuRegister>(); in GenMinMax()
558 XmmRegister out = locations->Out().AsFpuRegister<XmmRegister>(); in VisitMathSqrt()
571 Location out = invoke->GetLocations()->Out(); in InvokeOutOfLineIntrinsic()
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Dintrinsics_x86.cc202 Location output = locations->Out(); in MoveFPToInt()
217 Location output = locations->Out(); in MoveIntToFP()
286 Register out = locations->Out().AsRegister<Register>(); in GenReverseBytes()
320 Location output = locations->Out(); in VisitLongReverseBytes()
367 Location output = locations->Out(); in MathAbsFP()
428 Location output = locations->Out(); in GenAbsInteger()
459 Location output = locations->Out(); in GenAbsLong()
505 Location out_loc = locations->Out(); in GenMinMaxFP()
675 DCHECK(locations->Out().Equals(op1_loc)); in GenMinMax()
682 Location output = locations->Out(); in GenMinMax()
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Dcode_generator_mips.cc223 Location out = locations->Out(); in EmitNativeCode()
329 DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(locations->Out().reg())); in EmitNativeCode()
332 Register out = locations->Out().AsRegister<Register>(); in EmitNativeCode()
373 mips_codegen->MoveLocation(locations->Out(), in EmitNativeCode()
477 || !locations->GetLiveRegisters()->ContainsCoreRegister(locations->Out().reg())); in EmitNativeCode()
499 mips_codegen->MoveLocation(locations->Out(), ret_loc, ret_type); in EmitNativeCode()
2058 Register dst = locations->Out().AsRegister<Register>(); in HandleBinaryOp()
2102 Register dst_high = locations->Out().AsRegisterPairHigh<Register>(); in HandleBinaryOp()
2103 Register dst_low = locations->Out().AsRegisterPairLow<Register>(); in HandleBinaryOp()
2244 FRegister dst = locations->Out().AsFpuRegister<FRegister>(); in HandleBinaryOp()
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Dcode_generator_mips64.cc179 Location out = locations->Out(); in EmitNativeCode()
279 DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(locations->Out().reg())); in EmitNativeCode()
282 GpuRegister out = locations->Out().AsRegister<GpuRegister>(); in EmitNativeCode()
326 mips64_codegen->MoveLocation(locations->Out(), in EmitNativeCode()
427 || !locations->GetLiveRegisters()->ContainsCoreRegister(locations->Out().reg())); in EmitNativeCode()
449 mips64_codegen->MoveLocation(locations->Out(), ret_loc, ret_type); in EmitNativeCode()
1884 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); in HandleBinaryOp()
1942 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); in HandleBinaryOp()
1991 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); in HandleShift()
2135 Location out_loc = locations->Out(); in VisitArrayGet()
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Dintrinsics_arm_vixl.cc106 Location out = invoke_->GetLocations()->Out(); in EmitNativeCode()
280 Location output = locations->Out(); in MoveFPToInt()
290 Location output = locations->Out(); in MoveIntToFP()
348 vixl32::Register out = RegisterFrom(locations->Out()); in GenNumberOfLeadingZeros()
396 vixl32::Register out = RegisterFrom(locations->Out()); in GenNumberOfTrailingZeros()
477 Location output = locations->Out(); in GenAbsInteger()
525 Location out_loc = invoke->GetLocations()->Out(); in GenMinMaxFloat()
612 Location out_loc = invoke->GetLocations()->Out(); in GenMinMaxDouble()
678 Location out_loc = invoke->GetLocations()->Out(); in GenMinMaxLong()
885 vixl32::Register lo = LowRegisterFrom(invoke->GetLocations()->Out()); in VisitMemoryPeekLongNative()
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Dcode_generator_x86.cc225 DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(locations->Out().reg())); in EmitNativeCode()
236 x86_codegen->Move32(locations->Out(), Location::RegisterLocation(EAX)); in EmitNativeCode()
242 locations->Out().AsRegister<Register>()); in EmitNativeCode()
286 Location out = locations->Out(); in EmitNativeCode()
298 locations->Out().AsRegister<Register>()); in EmitNativeCode()
328 || !locations->GetLiveRegisters()->ContainsCoreRegister(locations->Out().reg())); in EmitNativeCode()
363 x86_codegen->Move32(locations->Out(), Location::RegisterLocation(EAX)); in EmitNativeCode()
1721 __ movl(flag->GetLocations()->Out().AsRegister<Register>(), in VisitShouldDeoptimizeFlag()
1772 DCHECK(locations->InAt(0).Equals(locations->Out())); in VisitSelect()
1835 codegen_->MoveLocation(locations->Out(), locations->InAt(1), select->GetType()); in VisitSelect()
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Dcode_generator_x86_64.cc264 Location out = locations->Out(); in EmitNativeCode()
277 locations->Out().AsRegister<CpuRegister>()); in EmitNativeCode()
305 DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(locations->Out().reg())); in EmitNativeCode()
319 x86_64_codegen->Move(locations->Out(), Location::RegisterLocation(RAX)); in EmitNativeCode()
324 locations->Out().AsRegister<CpuRegister>()); in EmitNativeCode()
346 || !locations->GetLiveRegisters()->ContainsCoreRegister(locations->Out().reg())); in EmitNativeCode()
375 x86_64_codegen->Move(locations->Out(), Location::RegisterLocation(RAX)); in EmitNativeCode()
1737 __ movl(flag->GetLocations()->Out().AsRegister<CpuRegister>(), in VisitShouldDeoptimizeFlag()
1788 DCHECK(locations->InAt(0).Equals(locations->Out())); in VisitSelect()
1833 codegen_->MoveLocation(locations->Out(), locations->InAt(1), select->GetType()); in VisitSelect()
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Dcommon_arm64.h82 return RegisterFrom(instr->GetLocations()->Out(), instr->GetType()); in OutputRegister()
116 return FPRegisterFrom(instr->GetLocations()->Out(), instr->GetType()); in OutputFPRegister()
Dcode_generator.cc113 if (locations->Out().IsUnallocated() in CheckTypeConsistency()
114 && (locations->Out().GetPolicy() == Location::kSameAsFirstInput)) { in CheckTypeConsistency()
119 DCHECK(CheckType(instruction->GetType(), locations->Out())) in CheckTypeConsistency()
121 << " " << locations->Out(); in CheckTypeConsistency()
533 MoveLocation(locations->Out(), calling_convention.GetReturnLocation(field_type), field_type); in GenerateUnresolvedFieldAccess()
Dcode_generator_arm_vixl.cc476 Location out = locations->Out(); in EmitNativeCode()
530 arm_codegen->Move32(locations->Out(), LocationFrom(r0)); in EmitNativeCode()
560 DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(locations->Out().reg())); in EmitNativeCode()
603 arm_codegen->Move32(locations->Out(), LocationFrom(r0)); in EmitNativeCode()
623 || !locations->GetLiveRegisters()->ContainsCoreRegister(locations->Out().reg())); in EmitNativeCode()
648 arm_codegen->Move32(locations->Out(), LocationFrom(r0)); in EmitNativeCode()
1646 const Location out = locations->Out(); in GenerateLongDataProc()
3203 const Location out = locations->Out(); in VisitSelect()
3831 Location out = locations->Out(); in VisitNeg()
4081 Location out = locations->Out(); in VisitTypeConversion()
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Dcode_generator_arm64.cc322 Location out = locations->Out(); in EmitNativeCode()
376 __ str(RegisterFrom(locations->Out(), Primitive::kPrimNot), in EmitNativeCode()
411 DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(locations->Out().reg())); in EmitNativeCode()
428 arm64_codegen->MoveLocation(locations->Out(), calling_convention.GetReturnLocation(type), type); in EmitNativeCode()
446 __ str(RegisterFrom(locations->Out(), Primitive::kPrimNot), in EmitNativeCode()
538 || !locations->GetLiveRegisters()->ContainsCoreRegister(locations->Out().reg())); in EmitNativeCode()
562 arm64_codegen->MoveLocation(locations->Out(), ret_loc, ret_type); in EmitNativeCode()
2332 Location out = locations->Out(); in HandleFieldGet()
2802 Location out = locations->Out(); in VisitArrayGet()
3299 Register res = RegisterFrom(locations->Out(), instruction->GetType()); in HandleCondition()
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Dregister_allocation_resolver.cc62 Location location = locations->Out(); in Resolve()
463 location_source = defined_by->GetLocations()->Out(); in ConnectSplitSiblings()
/art/tools/dexfuzz/
DREADME87 |Iterations|VerifyFail|MutateFail|Timed Out |Successful|Divergence|
98 Timed Out - mutated files that timed out for one or more backends.

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