/art/compiler/utils/x86_64/ |
D | jni_macro_assembler_x86_64.cc | 59 __ subq(CpuRegister(RSP), Immediate(rest_of_frame)); in BuildFrame() 68 __ movsd(Address(CpuRegister(RSP), offset), spill.AsXmmRegister()); in BuildFrame() 76 __ movq(Address(CpuRegister(RSP), 0), method_reg.AsX86_64().AsCpuRegister()); in BuildFrame() 82 __ movq(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), in BuildFrame() 86 __ movl(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), in BuildFrame() 91 __ movsd(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), in BuildFrame() 95 __ movss(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), in BuildFrame() 115 __ movsd(spill.AsXmmRegister(), Address(CpuRegister(RSP), offset)); in RemoveFrame() 122 __ addq(CpuRegister(RSP), Immediate(adjust)); in RemoveFrame() 140 __ addq(CpuRegister(RSP), Immediate(-static_cast<int64_t>(adjust))); in IncreaseFrameSize() [all …]
|
D | assembler_x86_64.h | 181 CHECK_EQ(base_in.AsRegister(), RSP); in Address() 182 Init(CpuRegister(RSP), disp.Int32Value()); in Address() 192 if (base_in.LowBits() == RSP) { in Init() 193 SetSIB(TIMES_1, CpuRegister(RSP), base_in); in Init() 197 if (base_in.LowBits() == RSP) { in Init() 198 SetSIB(TIMES_1, CpuRegister(RSP), base_in); in Init() 203 if (base_in.LowBits() == RSP) { in Init() 204 SetSIB(TIMES_1, CpuRegister(RSP), base_in); in Init() 212 CHECK_NE(index_in.AsRegister(), RSP); // Illegal addressing mode. in Address() 213 SetModRM(0, CpuRegister(RSP)); in Address() [all …]
|
D | assembler_x86_64_test.cc | 152 registers_.push_back(new x86_64::CpuRegister(x86_64::RSP)); in SetUpHelpers() 169 secondary_register_names_.emplace(x86_64::CpuRegister(x86_64::RSP), "esp"); in SetUpHelpers() 186 tertiary_register_names_.emplace(x86_64::CpuRegister(x86_64::RSP), "sp"); in SetUpHelpers() 203 quaternary_register_names_.emplace(x86_64::CpuRegister(x86_64::RSP), "spl"); in SetUpHelpers() 990 …)->movaps(x86_64::XmmRegister(x86_64::XMM0), x86_64::Address(x86_64::CpuRegister(x86_64::RSP), 4)); in TEST_F() 991 …GetAssembler()->movaps(x86_64::Address(x86_64::CpuRegister(x86_64::RSP), 2), x86_64::XmmRegister(x… in TEST_F() 999 …)->movups(x86_64::XmmRegister(x86_64::XMM0), x86_64::Address(x86_64::CpuRegister(x86_64::RSP), 4)); in TEST_F() 1000 …GetAssembler()->movups(x86_64::Address(x86_64::CpuRegister(x86_64::RSP), 2), x86_64::XmmRegister(x… in TEST_F() 1016 …)->movapd(x86_64::XmmRegister(x86_64::XMM0), x86_64::Address(x86_64::CpuRegister(x86_64::RSP), 4)); in TEST_F() 1017 …GetAssembler()->movapd(x86_64::Address(x86_64::CpuRegister(x86_64::RSP), 2), x86_64::XmmRegister(x… in TEST_F() [all …]
|
D | assembler_x86_64.cc | 3155 movsd(dst, Address(CpuRegister(RSP), 0)); in LoadDoubleConstant() 3156 addq(CpuRegister(RSP), Immediate(2 * sizeof(intptr_t))); in LoadDoubleConstant()
|
/art/runtime/arch/x86_64/ |
D | context_x86_64.cc | 31 gprs_[RSP] = &rsp_; in Reset() 34 rsp_ = X86_64Context::kBadGprBase + RSP; in Reset() 118 uintptr_t rsp = gprs[kNumberOfCpuRegisters - RSP - 1] - sizeof(intptr_t); in DoLongJump()
|
D | registers_x86_64.h | 34 RSP = 4, enumerator
|
D | context_x86_64.h | 40 SetGPR(RSP, new_sp); in SetSP()
|
/art/compiler/optimizing/ |
D | code_generator_x86_64.cc | 510 DCHECK_NE(ref_reg, RSP); in EmitNativeCode() 601 DCHECK_NE(ref_reg, RSP); in EmitNativeCode() 1154 __ movq(Address(CpuRegister(RSP), stack_index), CpuRegister(reg_id)); in SaveCoreRegister() 1159 __ movq(CpuRegister(reg_id), Address(CpuRegister(RSP), stack_index)); in RestoreCoreRegister() 1165 __ movups(Address(CpuRegister(RSP), stack_index), XmmRegister(reg_id)); in SaveFloatingPointRegister() 1167 __ movsd(Address(CpuRegister(RSP), stack_index), XmmRegister(reg_id)); in SaveFloatingPointRegister() 1174 __ movups(XmmRegister(reg_id), Address(CpuRegister(RSP), stack_index)); in RestoreFloatingPointRegister() 1176 __ movsd(XmmRegister(reg_id), Address(CpuRegister(RSP), stack_index)); in RestoreFloatingPointRegister() 1247 blocked_core_registers_[RSP] = true; in SetupBlockedRegisters() 1270 CpuRegister(RSP), -static_cast<int32_t>(GetStackOverflowReservedBytes(kX86_64)))); in GenerateFrameEntry() [all …]
|
D | intrinsics_x86_64.cc | 2663 __ popcntq(out, Address(CpuRegister(RSP), src.GetStackIndex())); in GenBitCount() 2666 __ popcntl(out, Address(CpuRegister(RSP), src.GetStackIndex())); in GenBitCount() 2739 __ bsrq(tmp, Address(CpuRegister(RSP), src.GetStackIndex())); in GenOneBit() 2742 __ bsrl(tmp, Address(CpuRegister(RSP), src.GetStackIndex())); in GenOneBit() 2767 __ movq(tmp, Address(CpuRegister(RSP), src.GetStackIndex())); in GenOneBit() 2770 __ movl(tmp, Address(CpuRegister(RSP), src.GetStackIndex())); in GenOneBit() 2854 __ bsrq(out, Address(CpuRegister(RSP), src.GetStackIndex())); in GenLeadingZeros() 2857 __ bsrl(out, Address(CpuRegister(RSP), src.GetStackIndex())); in GenLeadingZeros() 2928 __ bsfq(out, Address(CpuRegister(RSP), src.GetStackIndex())); in GenTrailingZeros() 2931 __ bsfl(out, Address(CpuRegister(RSP), src.GetStackIndex())); in GenTrailingZeros()
|
D | code_generator_x86_64.h | 574 assembler_.lock()->addl(Address(CpuRegister(RSP), 0), Immediate(0));
|