/art/compiler/optimizing/ |
D | intrinsics_arm_vixl.cc | 537 const vixl32::Register temp1 = temps.Acquire(); in GenMinMaxFloat() local 561 __ Vmov(temp1, op1); in GenMinMaxFloat() 564 __ Orr(temp1, temp1, temp2); in GenMinMaxFloat() 566 __ And(temp1, temp1, temp2); in GenMinMaxFloat() 568 __ Vmov(out, temp1); in GenMinMaxFloat() 573 __ Movt(temp1, High16Bits(kNanFloat)); // 0x7FC0xxxx is a NaN. in GenMinMaxFloat() 574 __ Vmov(out, temp1); in GenMinMaxFloat() 820 vixl32::SRegister temp1 = LowSRegisterFrom(invoke->GetLocations()->GetTemp(0)); in VisitMathRoundFloat() local 826 __ Vcvta(S32, F32, temp1, in_reg); in VisitMathRoundFloat() 827 __ Vmov(out_reg, temp1); in VisitMathRoundFloat() [all …]
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D | intrinsics_arm64.cc | 1271 Register temp1 = WRegisterFrom(locations->GetTemp(1)); in VisitStringCompareTo() local 1309 __ Lsr(temp1, temp2, 1u); in VisitStringCompareTo() 1313 __ Ldr(temp1, HeapOperand(arg, count_offset)); in VisitStringCompareTo() 1316 __ Subs(out, temp0, temp1); in VisitStringCompareTo() 1318 __ Csel(temp0, temp1, temp0, ge); in VisitStringCompareTo() 1331 __ Mov(temp1, value_offset); in VisitStringCompareTo() 1353 __ Ldr(temp4, MemOperand(str.X(), temp1.X())); in VisitStringCompareTo() 1354 __ Ldr(temp2, MemOperand(arg.X(), temp1.X())); in VisitStringCompareTo() 1357 __ Add(temp1, temp1, char_size * 4); in VisitStringCompareTo() 1364 temp1 = temp1.X(); in VisitStringCompareTo() [all …]
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D | intrinsics_x86.cc | 108 Register temp1 = temp1_loc.AsRegister<Register>(); in EmitNativeCode() local 124 __ xorl(temp1, temp1); in EmitNativeCode() 131 __ movl(temp2, Address(src, temp1, ScaleFactor::TIMES_4, adjusted_offset)); in EmitNativeCode() 133 __ leal(temp2, Address(src_pos.AsRegister<Register>(), temp1, ScaleFactor::TIMES_1, 0)); in EmitNativeCode() 154 __ movl(Address(dest, temp1, ScaleFactor::TIMES_4, adjusted_offset), temp2); in EmitNativeCode() 156 __ leal(temp3, Address(dest_pos.AsRegister<Register>(), temp1, ScaleFactor::TIMES_1, 0)); in EmitNativeCode() 160 __ addl(temp1, Immediate(1)); in EmitNativeCode() 220 XmmRegister temp1 = locations->GetTemp(0).AsFpuRegister<XmmRegister>(); in MoveIntToFP() local 222 __ movd(temp1, input.AsRegisterPairLow<Register>()); in MoveIntToFP() 224 __ punpckldq(temp1, temp2); in MoveIntToFP() [all …]
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D | intrinsics_x86_64.cc | 1184 CpuRegister temp1 = temp1_loc.AsRegister<CpuRegister>(); in VisitSystemArrayCopy() local 1262 temp1, in VisitSystemArrayCopy() 1271 temp1, in VisitSystemArrayCopy() 1298 __ movl(temp1, Address(dest, class_offset)); in VisitSystemArrayCopy() 1305 __ MaybeUnpoisonHeapReference(temp1); in VisitSystemArrayCopy() 1316 invoke, TMP_loc, temp1, component_offset, /* needs_null_check */ false); in VisitSystemArrayCopy() 1323 __ movl(CpuRegister(TMP), Address(temp1, component_offset)); in VisitSystemArrayCopy() 1355 __ cmpl(temp1, temp2); in VisitSystemArrayCopy() 1363 invoke, temp1_loc, temp1, component_offset, /* needs_null_check */ false); in VisitSystemArrayCopy() 1368 __ cmpl(Address(temp1, super_offset), Immediate(0)); in VisitSystemArrayCopy() [all …]
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D | intrinsics_mips64.cc | 1670 GpuRegister temp1 = locations->GetTemp(0).AsRegister<GpuRegister>(); in VisitStringEquals() local 1710 __ Lw(temp1, str, class_offset); in VisitStringEquals() 1712 __ Bnec(temp1, temp2, &return_false); in VisitStringEquals() 1716 __ Lw(temp1, str, count_offset); in VisitStringEquals() 1720 __ Bnec(temp1, temp2, &return_false); in VisitStringEquals() 1724 __ Beqzc(temp1, &return_true); in VisitStringEquals() 1736 __ Dext(temp2, temp1, 0, 1); // Extract compression flag. in VisitStringEquals() 1737 __ Srl(temp1, temp1, 1); // Extract length. in VisitStringEquals() 1738 __ Sllv(temp1, temp1, temp2); // Double the byte count if uncompressed. in VisitStringEquals() 1750 __ Addiu(temp1, temp1, mirror::kUseStringCompression ? -8 : -4); in VisitStringEquals() [all …]
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D | code_generator_arm_vixl.cc | 1029 vixl32::Register temp1, in LoadReferenceWithBakerReadBarrierAndUpdateFieldSlowPathARMVIXL() argument 1038 temp1_(temp1), in LoadReferenceWithBakerReadBarrierAndUpdateFieldSlowPathARMVIXL() 4583 vixl32::Register temp1 = RegisterFrom(locations->GetTemp(0)); in GenerateDivRemWithAnyConstant() local 4592 __ Mov(temp1, static_cast<int32_t>(magic)); in GenerateDivRemWithAnyConstant() 4593 __ Smull(temp2, temp1, dividend, temp1); in GenerateDivRemWithAnyConstant() 4596 __ Add(temp1, temp1, dividend); in GenerateDivRemWithAnyConstant() 4598 __ Sub(temp1, temp1, dividend); in GenerateDivRemWithAnyConstant() 4602 __ Asr(temp1, temp1, shift); in GenerateDivRemWithAnyConstant() 4606 __ Sub(out, temp1, Operand(temp1, vixl32::Shift(ASR), 31)); in GenerateDivRemWithAnyConstant() 4608 __ Sub(temp1, temp1, Operand(temp1, vixl32::Shift(ASR), 31)); in GenerateDivRemWithAnyConstant() [all …]
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D | intrinsics_mips.cc | 2093 Register temp1 = locations->GetTemp(0).AsRegister<Register>(); in VisitStringEquals() local 2132 __ Lw(temp1, str, class_offset); in VisitStringEquals() 2134 __ Bne(temp1, temp2, &return_false); in VisitStringEquals() 2138 __ Lw(temp1, str, count_offset); in VisitStringEquals() 2142 __ Bne(temp1, temp2, &return_false); in VisitStringEquals() 2146 __ Beqz(temp1, &return_true); in VisitStringEquals() 2160 __ Ext(temp2, temp1, 0, 1); in VisitStringEquals() 2162 __ Sll(temp2, temp1, 31); in VisitStringEquals() 2165 __ Srl(temp1, temp1, 1); // Extract length. in VisitStringEquals() 2166 __ Sllv(temp1, temp1, temp2); // Double the byte count if uncompressed. in VisitStringEquals() [all …]
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D | code_generator_mips64.cc | 644 GpuRegister temp1) in ReadBarrierMarkAndUpdateFieldSlowPathMIPS64() argument 649 temp1_(temp1) { in ReadBarrierMarkAndUpdateFieldSlowPathMIPS64() 2488 GpuRegister temp1 = locations->GetTemp(0).AsRegister<GpuRegister>(); in VisitArraySet() local 2522 __ LoadFromOffset(kLoadUnsignedWord, temp1, obj, class_offset, null_checker); in VisitArraySet() 2523 __ MaybeUnpoisonHeapReference(temp1); in VisitArraySet() 2526 __ LoadFromOffset(kLoadUnsignedWord, temp1, temp1, component_offset); in VisitArraySet() 2534 __ Beqc(temp1, temp2, &do_put); in VisitArraySet() 2537 __ MaybeUnpoisonHeapReference(temp1); in VisitArraySet() 2540 __ LoadFromOffset(kLoadUnsignedWord, temp1, temp1, super_offset); in VisitArraySet() 2543 __ Bnezc(temp1, slow_path->GetEntryLabel()); in VisitArraySet() [all …]
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D | code_generator_x86_64.h | 472 CpuRegister* temp1 = nullptr,
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D | code_generator_mips.cc | 695 Register temp1) in ReadBarrierMarkAndUpdateFieldSlowPathMIPS() argument 700 temp1_(temp1) { in ReadBarrierMarkAndUpdateFieldSlowPathMIPS() 2915 Register temp1 = locations->GetTemp(0).AsRegister<Register>(); in VisitArraySet() local 2949 __ LoadFromOffset(kLoadWord, temp1, obj, class_offset, null_checker); in VisitArraySet() 2950 __ MaybeUnpoisonHeapReference(temp1); in VisitArraySet() 2953 __ LoadFromOffset(kLoadWord, temp1, temp1, component_offset); in VisitArraySet() 2961 __ Beq(temp1, temp2, &do_put); in VisitArraySet() 2964 __ MaybeUnpoisonHeapReference(temp1); in VisitArraySet() 2967 __ LoadFromOffset(kLoadWord, temp1, temp1, super_offset); in VisitArraySet() 2970 __ Bnez(temp1, slow_path->GetEntryLabel()); in VisitArraySet() [all …]
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D | code_generator_arm_vixl.h | 340 vixl::aarch32::Register temp1,
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D | code_generator_x86_64.cc | 559 CpuRegister temp1, in ReadBarrierMarkAndUpdateFieldSlowPathX86_64() argument 566 temp1_(temp1), in ReadBarrierMarkAndUpdateFieldSlowPathX86_64() 6608 CpuRegister* temp1, in GenerateReferenceLoadWithBakerReadBarrier() argument 6667 DCHECK(temp1 != nullptr); in GenerateReferenceLoadWithBakerReadBarrier() 6670 instruction, ref, obj, src, /* unpoison_ref_before_marking */ true, *temp1, *temp2); in GenerateReferenceLoadWithBakerReadBarrier()
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D | code_generator_x86.cc | 4990 XmmRegister temp1 = locations->GetTemp(0).AsFpuRegister<XmmRegister>(); in HandleFieldSet() local 4992 __ movd(temp1, value.AsRegisterPairLow<Register>()); in HandleFieldSet() 4994 __ punpckldq(temp1, temp2); in HandleFieldSet() 4995 __ movsd(Address(base, offset), temp1); in HandleFieldSet()
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/art/runtime/ |
D | common_dex_operations.h | 186 std::string temp1, temp2, temp3; in DoFieldPutCommon() local 189 reg->GetClass()->GetDescriptor(&temp1), in DoFieldPutCommon()
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/art/test/458-checker-instruct-simplification/src/ |
D | Main.java | 720 int temp1 = -arg1; in $noinline$AddNegs2() local 722 return (temp1 + temp2) | (temp1 + temp2); in $noinline$AddNegs2()
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/art/runtime/interpreter/ |
D | interpreter_common.cc | 1081 std::string temp1, temp2; in DoCallCommon() local 1085 o->GetClass()->GetDescriptor(&temp1), in DoCallCommon()
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D | interpreter_switch_impl.cc | 361 std::string temp1, temp2; in ExecuteSwitchImpl() local 364 obj_result->GetClass()->GetDescriptor(&temp1), in ExecuteSwitchImpl()
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/art/runtime/mirror/ |
D | class.cc | 383 std::string temp1, temp2; in IsInSamePackage() local 384 return IsInSamePackage(klass1->GetDescriptor(&temp1), klass2->GetDescriptor(&temp2)); in IsInSamePackage()
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