/external/ltp/testcases/commands/mail/ |
D | mail_tests.sh | 102 RC2=0 144 RC2=0 186 RC2=$(awk '/^>N/ {print match($9 $10, "Returnedmail:")}' \ 191 RC2=$(awk '/^>N/ {print match($11 $12, "Returnedmail:")}' \ 196 if [ -z "$RC1" -a -z "$RC2" -a -z "$RC3" ]; then 209 if [ $RC1 -ne 0 -a $RC2 -ne 0 ] || [ $RC1 -ne 0 -a $RC3 -ne 0 ]; then 231 RC2=0 266 RC2=$(awk '/^>N/ {print match($9 $10, "Returnedmail:")}' \ 271 RC2=$(awk '/^>N/ {print match($11 $12, "Returnedmail:")}' \ 277 if [ -z "$RC1" -a -z "$RC2" -a -z "$RC3" ]; then [all …]
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/external/ltp/testcases/kernel/security/integrity/ima/tests/ |
D | ima_policy.sh | 94 wait "$p2"; RC2=$? 95 if [ $RC1 -eq 0 ] && [ $RC2 -eq 0 ]; then 97 elif [ $RC1 -eq 0 ] || [ $RC2 -eq 0 ]; then
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/external/bouncycastle/bcprov/src/main/java/org/bouncycastle/jcajce/provider/symmetric/ |
D | RC2.java | 41 public final class RC2 class 43 private RC2() in RC2() method in RC2 460 private static final String PREFIX = RC2.class.getName();
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/external/mdnsresponder/mDNSWindows/ControlPanel/res/ |
D | ControlPanel.rc2 | 2 // CPL_PP.RC2 - resources Microsoft Visual C++ does not edit directly
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/external/mdnsresponder/mDNSWindows/DNSServiceBrowser/WindowsCE/Resources/ |
D | Application.rc2 | 2 // APPLICATION.RC2 - resources Microsoft eMbedded Visual C++ does not edit directly
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/external/swiftshader/third_party/LLVM/utils/TableGen/ |
D | RegisterInfoEmitter.cpp | 553 const CodeGenRegisterClass *RC2 = RegBank.getRegClass(i->second); in runTargetDesc() local 554 assert(RC2 && "Invalid register class in SubRegClasses"); in runTargetDesc() 555 SuperRegClassMap[RC2->EnumValue].insert(rc); in runTargetDesc() 577 const CodeGenRegisterClass &RC2 = *RegisterClasses[*II]; in runTargetDesc() local 580 OS << "&" << RC2.getQualifiedName() << "RegClass"; in runTargetDesc()
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/external/ltp/utils/ffsb-6.0-rc2/ |
D | configure.in | 2 AC_INIT([ffsb], [6.0-RC2])
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D | configure | 2063 VERSION=6.0-RC2
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/external/bouncycastle/patches/ |
D | README | 13 - RC2
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D | bcprov.patch | 4154 - provider.addAlgorithm("KeyStore.PKCS12-3DES-40RC2", PREFIX + "PKCS12KeyStoreSpi$BCPKCS… 4157 - provider.addAlgorithm("KeyStore.PKCS12-DEF-3DES-40RC2", PREFIX + "PKCS12KeyStoreSpi$De… 4163 + // provider.addAlgorithm("KeyStore.PKCS12-3DES-40RC2", PREFIX + "PKCS12KeyStoreSpi$BCP… 4166 + // provider.addAlgorithm("KeyStore.PKCS12-DEF-3DES-40RC2", PREFIX + "PKCS12KeyStoreSpi… 5846 …bouncycastle/jcajce/provider/symmetric/RC2.java bcprov-jdk15on-152/org/bouncycastle/jcajce/provide… 5847 --- bcprov-jdk15on-152.orig/org/bouncycastle/jcajce/provider/symmetric/RC2.java 2015-03-01 12:03:02… 5848 +++ bcprov-jdk15on-152/org/bouncycastle/jcajce/provider/symmetric/RC2.java 2015-04-09 13:10:16.0000… 5893 - * RC2 5926 - * RC2 5947 + // * RC2 [all …]
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/external/llvm/lib/Target/Mips/ |
D | MipsSEFrameLowering.cpp | 294 const TargetRegisterClass *RC2 = in expandBuildPairF64() local 299 int FI = MF.getInfo<MipsFunctionInfo>()->getMoveF64ViaSpillFI(RC2); in expandBuildPairF64() 306 TII.loadRegFromStack(MBB, I, DstReg, FI, RC2, &RegInfo, 0); in expandBuildPairF64() 358 const TargetRegisterClass *RC2 = &Mips::GPR32RegClass; in expandExtractElementF64() local 364 TII.loadRegFromStack(MBB, I, DstReg, FI, RC2, &RegInfo, Offset); in expandExtractElementF64()
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/external/boringssl/src/crypto/obj/ |
D | objects.txt | 185 pkcs5 4 : PBE-MD2-RC2-64 : pbeWithMD2AndRC2-CBC 186 pkcs5 6 : PBE-MD5-RC2-64 : pbeWithMD5AndRC2-CBC 188 pkcs5 11 : PBE-SHA1-RC2-64 : pbeWithSHA1AndRC2-CBC 347 pkcs12-pbeids 5 : PBE-SHA1-RC2-128 : pbeWithSHA1And128BitRC2-CBC 349 pkcs12-pbeids 6 : PBE-SHA1-RC2-40 : pbeWithSHA1And40BitRC2-CBC 373 rsadsi 3 2 : RC2-CBC : rc2-cbc 374 : RC2-ECB : rc2-ecb 376 : RC2-CFB : rc2-cfb 378 : RC2-OFB : rc2-ofb 379 : RC2-40-CBC : rc2-40-cbc [all …]
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/external/llvm/utils/TableGen/ |
D | CodeGenRegisters.cpp | 1874 CodeGenRegisterClass *RC2 = &*I; in inferCommonSubClass() local 1875 if (RC1 == RC2) in inferCommonSubClass() 1880 const CodeGenRegister::Vec &Memb2 = RC2->getMembers(); in inferCommonSubClass() 1892 if (RC2->SpillSize > RC1->SpillSize || in inferCommonSubClass() 1893 (RC2->SpillSize == RC1->SpillSize && in inferCommonSubClass() 1894 RC2->SpillAlignment > RC1->SpillAlignment)) in inferCommonSubClass() 1895 std::swap(RC1, RC2); in inferCommonSubClass() 1898 RC1->getName() + "_and_" + RC2->getName()); in inferCommonSubClass()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonGenInsert.cpp | 316 const BitTracker::RegisterCell &RC1 = CM.lookup(VR1), &RC2 = CM.lookup(VR2); in operator ()() local 317 uint16_t W1 = RC1.width(), W2 = RC2.width(); in operator ()() 319 const BitTracker::BitValue &V1 = RC1[i], &V2 = RC2[i]; in operator ()() 335 const BitTracker::RegisterCell &RC2 = CM.lookup(VR2); in operator ()() local 336 uint16_t W1 = RC1.width(), W2 = RC2.width(); in operator ()() 350 const BitTracker::BitValue &V1 = RC1[Bit1], V2 = RC2[Bit2]; in operator ()()
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D | HexagonBitSimplify.cpp | 160 const BitTracker::RegisterCell &RC2, uint16_t B2, uint16_t W); 269 uint16_t B1, const BitTracker::RegisterCell &RC2, uint16_t B2, in isEqual() argument 276 if (RC2[B2+i].Type == BitTracker::BitValue::Ref && RC2[B2+i].RefI.Reg == 0) in isEqual() 278 if (RC1[B1+i] != RC2[B2+i]) in isEqual()
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D | HexagonInstrInfoV60.td | 1659 class T_HVX_condALU <string asmString, RegisterClass RC1, RegisterClass RC2> 1660 : CVI_VA_Resource1 <(outs RC2:$dst), 1661 (ins RC1:$src1, RC2:$_src_, RC2:$src2), asmString,
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/external/llvm/docs/ |
D | ReleaseProcess.rst | 40 RC1 and RC2, but not so much at the end of it. 74 * On the pre-release, you should change ``-rc 1`` to ``-final``. On RC2, change it to ``-rc 2`` and…
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/external/hamcrest/ |
D | CHANGES.txt | 65 == Version 1.3 RC2: Released October 22 2010 ==
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/external/llvm/unittests/Analysis/ |
D | LazyCallGraphTest.cpp | 884 LazyCallGraph::RefSCC *RC2 = CG.lookupRefSCC(B); in TEST() local 885 EXPECT_EQ(RC2, CG.lookupRefSCC(C)); in TEST() 886 EXPECT_EQ(RC2, NewRCs[0]); in TEST()
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/external/okhttp/ |
D | CHANGELOG.md | 482 a source-incompatible change, and is different from OkHttp 2.0.0-RC2 which 490 ## Version 2.0.0-RC2
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/external/pcre/dist2/ |
D | configure.ac | 9 dnl be defined as -RC2, for example. For real releases, it should be empty.
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/external/valgrind/ |
D | NEWS | 256 (3.13.0.RC2: 9 June 2017, vex r3389, valgrind r16443) 525 (3.12.0.RC2: 20 October 2016, vex r3282, valgrind r16096)
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D | NEWS.old | 294 (3.3.0.RC2: 5 Dec 2007, vex r1804, valgrind r7282).
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