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/external/swiftshader/third_party/subzero/unittest/AssemblerX8664/
DLowLevel.cpp277 TestRegReg(cmp, eax, ecx, i32, 2, 0x3B, 0xC1); in TEST_F()
278 TestRegReg(cmp, ecx, edx, i32, 2, 0x3B, 0xCA); in TEST_F()
279 TestRegReg(cmp, edx, ebx, i32, 2, 0x3B, 0xD3); in TEST_F()
280 TestRegReg(cmp, ebx, esp, i32, 2, 0x3B, 0xDC); in TEST_F()
281 TestRegReg(cmp, esp, ebp, i32, 2, 0x3B, 0xE5); in TEST_F()
282 TestRegReg(cmp, ebp, esi, i32, 2, 0x3B, 0xEE); in TEST_F()
283 TestRegReg(cmp, esi, edi, i32, 2, 0x3B, 0xF7); in TEST_F()
284 TestRegReg(cmp, edi, r8, i32, 3, 0x41, 0x3B, 0xF8); in TEST_F()
285 TestRegReg(cmp, r8, r9, i32, 3, 0x45, 0x3B, 0xC1); in TEST_F()
286 TestRegReg(cmp, r9, r10, i32, 3, 0x45, 0x3B, 0xCA); in TEST_F()
[all …]
/external/swiftshader/third_party/subzero/unittest/AssemblerX8632/
DLowLevel.cpp236 TestRegReg(cmp, eax, ecx, i32, 2, 0x3B, 0xC1); in TEST_F()
237 TestRegReg(cmp, ecx, edx, i32, 2, 0x3B, 0xCA); in TEST_F()
238 TestRegReg(cmp, edx, ebx, i32, 2, 0x3B, 0xD3); in TEST_F()
239 TestRegReg(cmp, ebx, esp, i32, 2, 0x3B, 0xDC); in TEST_F()
240 TestRegReg(cmp, esp, ebp, i32, 2, 0x3B, 0xE5); in TEST_F()
241 TestRegReg(cmp, ebp, esi, i32, 2, 0x3B, 0xEE); in TEST_F()
242 TestRegReg(cmp, esi, edi, i32, 2, 0x3B, 0xF7); in TEST_F()
243 TestRegReg(cmp, edi, eax, i32, 2, 0x3B, 0xF8); in TEST_F()
245 TestRegReg(cmp, eax, ecx, i16, 3, 0x66, 0x3B, 0xC1); in TEST_F()
246 TestRegReg(cmp, ecx, edx, i16, 3, 0x66, 0x3B, 0xCA); in TEST_F()
[all …]
/external/swiftshader/third_party/subzero/crosstest/
Dtest_fcmp.pnacl.ll6 %cmp = fcmp false float %a, %b
7 %cmp.ret_ext = zext i1 %cmp to i32
8 ret i32 %cmp.ret_ext
15 %cmp = fcmp false double %a, %b
16 %cmp.ret_ext = zext i1 %cmp to i32
17 ret i32 %cmp.ret_ext
24 %cmp = fcmp oeq float %a, %b
25 %cmp.ret_ext = zext i1 %cmp to i32
26 ret i32 %cmp.ret_ext
35 %cmp = fcmp oeq double %a, %b
[all …]
Dtest_icmp.h20 #define X(cmp, op) \ argument
21 bool icmp##cmp(uint8_t a, uint8_t b); \
22 bool icmp##cmp(uint16_t a, uint16_t b); \
23 bool icmp##cmp(uint32_t a, uint32_t b); \
24 bool icmp##cmp(uint64 a, uint64 b); \
25 v4ui32 icmp##cmp(v4ui32 a, v4ui32 b); \
26 v8ui16 icmp##cmp(v8ui16 a, v8ui16 b); \
27 v16ui8 icmp##cmp(v16ui8 a, v16ui8 b); \
28 bool icmp_zero##cmp(uint8_t a); \
29 bool icmp_zero##cmp(uint16_t a); \
[all …]
Dtest_icmp_i1vec.ll5 %cmp = icmp eq <16 x i1> %a.trunc, %b.trunc
6 %cmp.sext = sext <16 x i1> %cmp to <16 x i8>
7 ret <16 x i8> %cmp.sext
14 %cmp = icmp ne <16 x i1> %a.trunc, %b.trunc
15 %cmp.sext = sext <16 x i1> %cmp to <16 x i8>
16 ret <16 x i8> %cmp.sext
23 %cmp = icmp ugt <16 x i1> %a.trunc, %b.trunc
24 %cmp.sext = sext <16 x i1> %cmp to <16 x i8>
25 ret <16 x i8> %cmp.sext
32 %cmp = icmp uge <16 x i1> %a.trunc, %b.trunc
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Dtest_icmp.cpp20 #define X(cmp, op) \ argument
21 bool icmp##cmp(uint8_t a, uint8_t b) { return a op b; } \
22 bool icmp##cmp(uint16_t a, uint16_t b) { return a op b; } \
23 bool icmp##cmp(uint32_t a, uint32_t b) { return a op b; } \
24 bool icmp##cmp(uint64 a, uint64 b) { return a op b; } \
25 v4ui32 icmp##cmp(v4ui32 a, v4ui32 b) { return a op b; } \
26 v8ui16 icmp##cmp(v8ui16 a, v8ui16 b) { return a op b; } \
27 v16ui8 icmp##cmp(v16ui8 a, v16ui8 b) { return a op b; } \
28 bool icmp_zero##cmp(uint8_t a) { return a op 0; } \
29 bool icmp_zero##cmp(uint16_t a) { return a op 0; } \
[all …]
/external/jacoco/org.jacoco.core.test/src/org/jacoco/core/analysis/
DCounterComparatorTest.java31 final Comparator<ICounter> cmp = CounterComparator.TOTALITEMS; in testTotalItemsComparator() local
32 assertCmpLess(cmp, 19, 5, 19, 6); in testTotalItemsComparator()
33 assertCmpEquals(cmp, 20, 5, 19, 6); in testTotalItemsComparator()
34 assertCmpGreater(cmp, 21, 5, 19, 6); in testTotalItemsComparator()
39 final Comparator<ICounter> cmp = CounterComparator.COVEREDITEMS; in testCoveredItemsComparator() local
40 assertCmpLess(cmp, 73, 7, 42, 8); in testCoveredItemsComparator()
41 assertCmpEquals(cmp, 42, 8, 82, 8); in testCoveredItemsComparator()
42 assertCmpGreater(cmp, 21, 9, 32, 8); in testCoveredItemsComparator()
47 final Comparator<ICounter> cmp = CounterComparator.MISSEDITEMS; in testMissedItemsComparator() local
48 assertCmpLess(cmp, 10, 40, 11, 80); in testMissedItemsComparator()
[all …]
/external/llvm/test/CodeGen/AArch64/
Darm64-fast-isel-icmp.ll6 ; CHECK: cmp w0, #31
8 %cmp = icmp eq i32 %a, 31
9 %conv = zext i1 %cmp to i32
18 %cmp = icmp eq i32 %a, -7
19 %conv = zext i1 %cmp to i32
26 ; CHECK: cmp w0, w1
28 %cmp = icmp eq i32 %a, %b
29 %conv = zext i1 %cmp to i32
36 ; CHECK: cmp w0, w1
38 %cmp = icmp ne i32 %a, %b
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/external/llvm/test/Transforms/InstCombine/
Dicmp-shr.ll9 %cmp = icmp eq i8 %shr, 0
10 ret i1 %cmp
17 %cmp = icmp eq i8 %shr, 0
18 ret i1 %cmp
25 %cmp = icmp ne i8 %shr, 0
26 ret i1 %cmp
33 %cmp = icmp ne i8 %shr, 0
34 ret i1 %cmp
41 %cmp = icmp eq i8 %shr, 128
42 ret i1 %cmp
[all …]
Dcast-int-fcmp-eq-0.ll8 %cmp = fcmp oeq float %f, 0.0
9 ret i1 %cmp
17 %cmp = fcmp oeq float %f, -0.0
18 ret i1 %cmp
26 %cmp = fcmp oeq float %f, 0.0
27 ret i1 %cmp
35 %cmp = fcmp oeq float %f, -0.0
36 ret i1 %cmp
44 %cmp = fcmp one float %f, 0.0
45 ret i1 %cmp
[all …]
Dunordered-fcmp-select.ll4 ; CHECK: %cmp.inv = fcmp ole float %a, %b
5 ; CHECK-NEXT: %sel = select i1 %cmp.inv, float %b, float %a
8 %cmp = fcmp ugt float %a, %b
9 %sel = select i1 %cmp, float %a, float %b
14 ; CHECK: %cmp.inv = fcmp olt float %a, %b
15 ; CHECK-NEXT: %sel = select i1 %cmp.inv, float %b, float %a
18 %cmp = fcmp uge float %a, %b
19 %sel = select i1 %cmp, float %a, float %b
24 ; CHECK: %cmp.inv = fcmp ole float %a, %b
25 ; CHECK-NEXT: %sel = select i1 %cmp.inv, float %a, float %b
[all …]
Dor-fcmp.ll8 %cmp = fcmp false double %a, %b
10 %retval = or i1 %cmp, %cmp1
19 %cmp = fcmp oeq double %a, %b
21 %retval = or i1 %cmp, %cmp1
30 %cmp = fcmp oeq double %a, %b
32 %retval = or i1 %cmp, %cmp1
41 %cmp = fcmp ogt double %a, %b
43 %retval = or i1 %cmp, %cmp1
52 %cmp = fcmp ogt double %a, %b
54 %retval = or i1 %cmp, %cmp1
[all …]
Dand-fcmp.ll12 %cmp = fcmp ord float %a, 0.000000e+00
14 %and = and i1 %cmp, %cmp1
25 %cmp = fcmp ord <2 x float> %a, zeroinitializer
27 %and = and <2 x i1> %cmp, %cmp1
35 %cmp = fcmp false double %a, %b
37 %retval = and i1 %cmp, %cmp1
45 %cmp = fcmp oeq double %a, %b
47 %retval = and i1 %cmp, %cmp1
56 %cmp = fcmp oeq double %a, %b
58 %retval = and i1 %cmp, %cmp1
[all …]
Dfcmp.ll8 %cmp = fcmp ogt double %ext1, %ext2
9 ret i1 %cmp
16 %cmp = fcmp ogt double %ext, 1.000000e+00
17 ret i1 %cmp
24 %cmp = fcmp ogt double %ext, 0x3FF0000000000001 ; more precision than float.
25 ret i1 %cmp
32 %cmp = fcmp ogt double %ext, 0x36A0000000000000 ; denormal in float.
33 ret i1 %cmp
40 %cmp = fcmp ogt float %neg, 1.000000e+00
41 ret i1 %cmp
[all …]
/external/llvm/test/Transforms/InstSimplify/
Dshr-nop.ll21 %cmp = icmp eq i8 %shr, 0
22 ret i1 %cmp
30 %cmp = icmp eq i8 %shr, 0
31 ret i1 %cmp
39 %cmp = icmp eq i8 %shr, 0
40 ret i1 %cmp
48 %cmp = icmp ne i8 %shr, 0
49 ret i1 %cmp
57 %cmp = icmp ne i8 %shr, 0
58 ret i1 %cmp
[all …]
/external/llvm/test/CodeGen/NVPTX/
Dcombine-min-max.ll10 %cmp = icmp eq i32 %a, %b
11 %sel = select i1 %cmp, i32 %a, i32 %b
19 %cmp = icmp ne i64 %a, %b
20 %sel = select i1 %cmp, i64 %b, i64 %a
33 %cmp = icmp ugt i16 %a, %b
34 %sel = select i1 %cmp, i16 %a, i16 %b
46 %cmp = icmp ugt i32 %a, %b
47 %sel = select i1 %cmp, i32 %a, i32 %b
54 %cmp = icmp uge i32 %a, %b
55 %sel = select i1 %cmp, i32 %a, i32 %b
[all …]
Dcompare-int.ll15 %cmp = icmp eq i64 %a, %b
16 %ret = zext i1 %cmp to i64
24 %cmp = icmp ne i64 %a, %b
25 %ret = zext i1 %cmp to i64
33 %cmp = icmp ugt i64 %a, %b
34 %ret = zext i1 %cmp to i64
42 %cmp = icmp uge i64 %a, %b
43 %ret = zext i1 %cmp to i64
51 %cmp = icmp ult i64 %a, %b
52 %ret = zext i1 %cmp to i64
[all …]
/external/llvm/test/CodeGen/Hexagon/
Dcmp-promote.ll6 ; CHECK: cmp.eq{{.*}}#-16
9 %not.cmp = icmp ne i16 %q, -16
10 %res.0 = zext i1 %not.cmp to i32
14 ; CHECK: cmp.eq{{.*}}#-14
17 %cmp = icmp eq i16 %q, -14
18 %res.0 = select i1 %cmp, i32 2, i32 0
22 ; CHECK: cmp.eq{{.*}}#-8
25 %cmp = icmp eq i8 %r, -8
26 %res.0 = select i1 %cmp, i32 0, i32 3
30 ; CHECK: cmp.eq{{.*}}#-6
[all …]
/external/iproute2/tc/
Dem_cmp.c47 struct tcf_em_cmp cmp; in cmp_parse_eopt() local
49 memset(&cmp, 0, sizeof(cmp)); in cmp_parse_eopt()
103 cmp.flags |= TCF_EM_CMP_TRANS; in cmp_parse_eopt()
130 cmp.val = (__u32) value; in cmp_parse_eopt()
131 cmp.mask = (__u32) mask; in cmp_parse_eopt()
132 cmp.off = (__u16) offset; in cmp_parse_eopt()
133 cmp.align = (__u8) align; in cmp_parse_eopt()
134 cmp.layer = (__u8) layer; in cmp_parse_eopt()
135 cmp.opnd = (__u8) opnd; in cmp_parse_eopt()
138 addraw_l(n, MAX_MSG, &cmp, sizeof(cmp)); in cmp_parse_eopt()
[all …]
/external/swiftshader/third_party/subzero/tests_lit/assembler/arm32/
Dcmp-vec.ll27 %cmp = icmp eq <4 x i32> %a, %b
33 %cmp.ret_ext = zext <4 x i1> %cmp to <4 x i32>
34 ret <4 x i32> %cmp.ret_ext
43 %cmp = icmp ne <4 x i32> %a, %b
52 %cmp.ret_ext = zext <4 x i1> %cmp to <4 x i32>
53 ret <4 x i32> %cmp.ret_ext
62 %cmp = icmp ugt <4 x i32> %a, %b
68 %cmp.ret_ext = zext <4 x i1> %cmp to <4 x i32>
69 ret <4 x i32> %cmp.ret_ext
78 %cmp = icmp uge <4 x i32> %a, %b
[all …]
/external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/
Dicmp.ll16 %cmp = icmp eq i32 %a, %b
17 %cmp.ret_ext = zext i1 %cmp to i32
18 ret i32 %cmp.ret_ext
26 %cmp = icmp ne i32 %a, %b
27 %cmp.ret_ext = zext i1 %cmp to i32
28 ret i32 %cmp.ret_ext
36 %cmp = icmp sgt i32 %a, %b
37 %cmp.ret_ext = zext i1 %cmp to i32
38 ret i32 %cmp.ret_ext
45 %cmp = icmp ugt i32 %a, %b
[all …]
/external/llvm/test/CodeGen/PowerPC/
Dvec_cmp.ll13 %cmp = icmp eq <2 x i8> %x, %y
14 %sext = sext <2 x i1> %cmp to <2 x i8>
22 %cmp = icmp eq <4 x i8> %x, %y
23 %sext = sext <4 x i1> %cmp to <4 x i8>
31 %cmp = icmp eq <8 x i8> %x, %y
32 %sext = sext <8 x i1> %cmp to <8 x i8>
42 %cmp = icmp eq <16 x i8> %x, %y
43 %sext = sext <16 x i1> %cmp to <16 x i8>
51 %cmp = icmp ne <16 x i8> %x, %y
52 %sext = sext <16 x i1> %cmp to <16 x i8>
[all …]
/external/llvm/test/MC/Disassembler/Hexagon/
Dj.txt14 # CHECK: p0 = cmp.eq(r17,#-1); if (p0.new) jump:nt
16 # CHECK: p0 = cmp.gt(r17,#-1); if (p0.new) jump:nt
20 # CHECK: p0 = cmp.eq(r17,#-1); if (p0.new) jump:t
22 # CHECK: p0 = cmp.gt(r17,#-1); if (p0.new) jump:t
26 # CHECK: p0 = cmp.eq(r17,#-1); if (!p0.new) jump:nt
28 # CHECK: p0 = cmp.gt(r17,#-1); if (!p0.new) jump:nt
32 # CHECK: p0 = cmp.eq(r17,#-1); if (!p0.new) jump:t
34 # CHECK: p0 = cmp.gt(r17,#-1); if (!p0.new) jump:t
38 # CHECK: p0 = cmp.eq(r17, #21); if (p0.new) jump:nt
40 # CHECK: p0 = cmp.eq(r17, #21); if (p0.new) jump:t
[all …]
/external/llvm/test/CodeGen/X86/
Dfpcmp-soft-fp.ll5 %cmp = fcmp ule double %d, 0.000000e+00
6 ret i1 %cmp
15 %cmp = fcmp ult double %d, 0.000000e+00
16 ret i1 %cmp
25 %cmp = fcmp ugt double %d, 0.000000e+00
26 ret i1 %cmp
35 %cmp = fcmp uge double %d, 0.000000e+00
36 ret i1 %cmp
45 %cmp = fcmp ole double %d, 0.000000e+00
46 ret i1 %cmp
[all …]
/external/llvm/test/CodeGen/SPARC/
Dsoft-float.ll93 %cmp = fcmp uno float %a, %b
94 ret i1 %cmp
100 %cmp = fcmp uno double %a, %b
101 ret i1 %cmp
107 %cmp = fcmp uno fp128 %a, %b
108 ret i1 %cmp
114 %cmp = fcmp oeq float %a, %b
115 ret i1 %cmp
121 %cmp = fcmp oeq double %a, %b
122 ret i1 %cmp
[all …]

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