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/external/deqp/framework/opengl/
DgluES3PlusWrapperFuncs.inl6 dst->activeShaderProgram = src.activeShaderProgram;
7 dst->activeTexture = src.activeTexture;
8 dst->attachShader = src.attachShader;
9 dst->beginQuery = src.beginQuery;
10 dst->beginTransformFeedback = src.beginTransformFeedback;
11 dst->bindAttribLocation = src.bindAttribLocation;
12 dst->bindBuffer = src.bindBuffer;
13 dst->bindBufferBase = src.bindBufferBase;
14 dst->bindBufferRange = src.bindBufferRange;
15 dst->bindFramebuffer = src.bindFramebuffer;
[all …]
/external/valgrind/none/tests/amd64/
Dsse4-64.c92 ULong src64, V128* dst, V128* res ) in showIGVV() argument
97 showV128(dst); in showIGVV()
395 V128 src, dst; in test_BLENDPD() local
399 randV128(&dst); in test_BLENDPD()
400 DO_imm_mandr_r("blendpd", 0, src, dst); in test_BLENDPD()
401 DO_imm_mandr_r("blendpd", 1, src, dst); in test_BLENDPD()
402 DO_imm_mandr_r("blendpd", 2, src, dst); in test_BLENDPD()
403 DO_imm_mandr_r("blendpd", 3, src, dst); in test_BLENDPD()
409 V128 src, dst; in test_BLENDPS() local
413 randV128(&dst); in test_BLENDPS()
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/external/mesa3d/prebuilt-intermediates/main/
Dformat_unpack.c56 unpack_float_a8b8g8r8_unorm(const void *void_src, GLfloat dst[4]) in unpack_float_a8b8g8r8_unorm()
66 dst[0] = _mesa_unorm_to_float(r, 8); in unpack_float_a8b8g8r8_unorm()
69 dst[1] = _mesa_unorm_to_float(g, 8); in unpack_float_a8b8g8r8_unorm()
72 dst[2] = _mesa_unorm_to_float(b, 8); in unpack_float_a8b8g8r8_unorm()
75 dst[3] = _mesa_unorm_to_float(a, 8); in unpack_float_a8b8g8r8_unorm()
79 unpack_float_x8b8g8r8_unorm(const void *void_src, GLfloat dst[4]) in unpack_float_x8b8g8r8_unorm()
88 dst[0] = _mesa_unorm_to_float(r, 8); in unpack_float_x8b8g8r8_unorm()
91 dst[1] = _mesa_unorm_to_float(g, 8); in unpack_float_x8b8g8r8_unorm()
94 dst[2] = _mesa_unorm_to_float(b, 8); in unpack_float_x8b8g8r8_unorm()
96 dst[3] = 1.0f; in unpack_float_x8b8g8r8_unorm()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrShiftRotate.td18 let Constraints = "$src1 = $dst" in {
20 def SHL8rCL : I<0xD2, MRM4r, (outs GR8 :$dst), (ins GR8 :$src1),
21 "shl{b}\t{%cl, $dst|$dst, CL}",
22 [(set GR8:$dst, (shl GR8:$src1, CL))]>;
23 def SHL16rCL : I<0xD3, MRM4r, (outs GR16:$dst), (ins GR16:$src1),
24 "shl{w}\t{%cl, $dst|$dst, CL}",
25 [(set GR16:$dst, (shl GR16:$src1, CL))]>, OpSize;
26 def SHL32rCL : I<0xD3, MRM4r, (outs GR32:$dst), (ins GR32:$src1),
27 "shl{l}\t{%cl, $dst|$dst, CL}",
28 [(set GR32:$dst, (shl GR32:$src1, CL))]>;
[all …]
/external/wpa_supplicant_8/wpa_supplicant/
Dctrl_iface_named_pipe.c87 static void ctrl_close_pipe(struct wpa_ctrl_dst *dst);
93 static void global_close_pipe(struct wpa_global_dst *dst);
116 struct wpa_ctrl_dst *dst, *next; in ctrl_flush_broken_pipes() local
118 dst = priv->ctrl_dst; in ctrl_flush_broken_pipes()
120 while (dst) { in ctrl_flush_broken_pipes()
121 next = dst->next; in ctrl_flush_broken_pipes()
122 if (ctrl_broken_pipe(dst->pipe, dst->used)) { in ctrl_flush_broken_pipes()
124 dst); in ctrl_flush_broken_pipes()
125 ctrl_close_pipe(dst); in ctrl_flush_broken_pipes()
127 dst = next; in ctrl_flush_broken_pipes()
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/external/llvm/lib/Target/X86/
DX86InstrShiftRotate.td18 let Constraints = "$src1 = $dst", SchedRW = [WriteShift] in {
20 def SHL8rCL : I<0xD2, MRM4r, (outs GR8 :$dst), (ins GR8 :$src1),
21 "shl{b}\t{%cl, $dst|$dst, cl}",
22 [(set GR8:$dst, (shl GR8:$src1, CL))], IIC_SR>;
23 def SHL16rCL : I<0xD3, MRM4r, (outs GR16:$dst), (ins GR16:$src1),
24 "shl{w}\t{%cl, $dst|$dst, cl}",
25 [(set GR16:$dst, (shl GR16:$src1, CL))], IIC_SR>, OpSize16;
26 def SHL32rCL : I<0xD3, MRM4r, (outs GR32:$dst), (ins GR32:$src1),
27 "shl{l}\t{%cl, $dst|$dst, cl}",
28 [(set GR32:$dst, (shl GR32:$src1, CL))], IIC_SR>, OpSize32;
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/external/openssh/openbsd-compat/
Dvis.c62 vis(char *dst, int c, int flag, int nextc) in vis() argument
67 *dst++ = '\\'; in vis()
68 *dst++ = c; in vis()
69 *dst = '\0'; in vis()
70 return (dst); in vis()
76 *dst++ = '\\'; in vis()
77 *dst++ = 'n'; in vis()
80 *dst++ = '\\'; in vis()
81 *dst++ = 'r'; in vis()
84 *dst++ = '\\'; in vis()
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/external/v8/src/ia32/
Dassembler-ia32.h597 void pop(Register dst);
598 void pop(const Operand& dst);
604 void mov_b(Register dst, Register src) { mov_b(dst, Operand(src)); } in mov_b() argument
605 void mov_b(Register dst, const Operand& src);
606 void mov_b(Register dst, int8_t imm8) { mov_b(Operand(dst), imm8); } in mov_b() argument
607 void mov_b(const Operand& dst, int8_t src) { mov_b(dst, Immediate(src)); } in mov_b() argument
608 void mov_b(const Operand& dst, const Immediate& src);
609 void mov_b(const Operand& dst, Register src);
611 void mov_w(Register dst, const Operand& src);
612 void mov_w(const Operand& dst, int16_t src) { mov_w(dst, Immediate(src)); } in mov_w() argument
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/external/v8/src/x64/
Dassembler-x64.h673 void popq(Register dst);
674 void popq(const Operand& dst);
680 void movb(Register dst, const Operand& src);
681 void movb(Register dst, Immediate imm);
682 void movb(const Operand& dst, Register src);
683 void movb(const Operand& dst, Immediate imm);
687 void movw(Register dst, const Operand& src);
688 void movw(const Operand& dst, Register src);
689 void movw(const Operand& dst, Immediate imm);
693 void movl(const Operand& dst, Label* src);
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Dassembler-x64.cc586 Register dst, in immediate_arithmetic_op() argument
590 emit_rex(dst, size); in immediate_arithmetic_op()
593 emit_modrm(subcode, dst); in immediate_arithmetic_op()
595 } else if (dst.is(rax)) { in immediate_arithmetic_op()
600 emit_modrm(subcode, dst); in immediate_arithmetic_op()
606 const Operand& dst, in immediate_arithmetic_op() argument
610 emit_rex(dst, size); in immediate_arithmetic_op()
613 emit_operand(subcode, dst); in immediate_arithmetic_op()
617 emit_operand(subcode, dst); in immediate_arithmetic_op()
624 Register dst, in immediate_arithmetic_op_16() argument
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/external/valgrind/none/tests/s390x/
Dcu12_1.stdout.exp7 dst address difference: 12 dst len: 1988
14 dst address difference: 0 dst len: 2000
19 dst address difference: 0 dst len: 2000
24 dst address difference: 0 dst len: 2000
29 dst address difference: 0 dst len: 2000
34 dst address difference: 0 dst len: 2000
39 dst address difference: 0 dst len: 2000
44 dst address difference: 0 dst len: 2000
49 dst address difference: 0 dst len: 2000
56 dst address difference: 0 dst len: 2000
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Dcu12.stdout.exp7 dst address difference: 12 dst len: 1988
14 dst address difference: 0 dst len: 2000
19 dst address difference: 0 dst len: 2000
24 dst address difference: 0 dst len: 2000
29 dst address difference: 0 dst len: 2000
34 dst address difference: 0 dst len: 2000
39 dst address difference: 0 dst len: 2000
44 dst address difference: 0 dst len: 2000
49 dst address difference: 0 dst len: 2000
56 dst address difference: 0 dst len: 2000
[all …]
Dcu14_1.stdout.exp7 dst address difference: 24 dst len: 1976
14 dst address difference: 0 dst len: 2000
19 dst address difference: 0 dst len: 2000
24 dst address difference: 0 dst len: 2000
29 dst address difference: 0 dst len: 2000
34 dst address difference: 0 dst len: 2000
39 dst address difference: 0 dst len: 2000
44 dst address difference: 0 dst len: 2000
49 dst address difference: 0 dst len: 2000
56 dst address difference: 0 dst len: 2000
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Dcu14.stdout.exp7 dst address difference: 24 dst len: 1976
14 dst address difference: 0 dst len: 2000
19 dst address difference: 0 dst len: 2000
24 dst address difference: 0 dst len: 2000
29 dst address difference: 0 dst len: 2000
34 dst address difference: 0 dst len: 2000
39 dst address difference: 0 dst len: 2000
44 dst address difference: 0 dst len: 2000
49 dst address difference: 0 dst len: 2000
56 dst address difference: 0 dst len: 2000
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Dcu42.stdout.exp5 dst len: 0
11 dst address difference: 0 dst len: 2000
15 dst address difference: 0 dst len: 2000
19 dst address difference: 0 dst len: 2000
23 dst address difference: 0 dst len: 2000
27 dst address difference: 0 dst len: 2000
31 dst address difference: 0 dst len: 2000
35 dst address difference: 0 dst len: 2000
39 dst address difference: 0 dst len: 2000
45 dst address difference: 2 dst len: 1998
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Dcu41.stdout.exp5 dst len: 0
11 dst address difference: 0 dst len: 1000
15 dst address difference: 0 dst len: 1000
19 dst address difference: 0 dst len: 1000
23 dst address difference: 0 dst len: 1000
27 dst address difference: 0 dst len: 1000
31 dst address difference: 0 dst len: 1000
35 dst address difference: 0 dst len: 1000
39 dst address difference: 0 dst len: 1000
45 dst address difference: 1 dst len: 999
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/external/mesa3d/prebuilt-intermediates/nir/
Dnir_constant_expressions.c267 float32_t dst = src0 ? 1.0f : 0.0f; in evaluate_b2f() local
269 _dst_val.f32[_i] = dst; in evaluate_b2f()
281 float32_t dst = src0 ? 1.0f : 0.0f; in evaluate_b2f() local
283 _dst_val.f32[_i] = dst; in evaluate_b2f()
309 int32_t dst = src0 ? 1 : 0; in evaluate_b2i() local
311 _dst_val.i32[_i] = dst; in evaluate_b2i()
323 int32_t dst = src0 ? 1 : 0; in evaluate_b2i() local
325 _dst_val.i32[_i] = dst; in evaluate_b2i()
362 struct bool32_vec dst; in evaluate_ball_fequal2() local
364 dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y)); in evaluate_ball_fequal2()
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/external/protobuf/objectivec/Tests/
DGPBMessageTests+Merge.m54 Message3 *dst = [[Message3 alloc] init];
58 dst.optionalInt32 = 1;
59 dst.optionalInt64 = 1;
60 dst.optionalUint32 = 1;
61 dst.optionalUint64 = 1;
62 dst.optionalSint32 = 1;
63 dst.optionalSint64 = 1;
64 dst.optionalFixed32 = 1;
65 dst.optionalFixed64 = 1;
66 dst.optionalSfixed32 = 1;
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/external/mesa3d/src/gallium/auxiliary/rtasm/
Drtasm_x86sse.c288 struct x86_reg dst, in emit_op_modrm() argument
291 switch (dst.mod) { in emit_op_modrm()
294 emit_modrm(p, dst, src); in emit_op_modrm()
301 emit_modrm(p, src, dst); in emit_op_modrm()
455 void x86_mov_reg_imm( struct x86_function *p, struct x86_reg dst, int imm ) in x86_mov_reg_imm() argument
457 DUMP_RI( dst, imm ); in x86_mov_reg_imm()
458 assert(dst.file == file_REG32); in x86_mov_reg_imm()
459 assert(dst.mod == mod_REG); in x86_mov_reg_imm()
460 emit_1ub(p, 0xb8 + dst.idx); in x86_mov_reg_imm()
464 void x86_mov_imm( struct x86_function *p, struct x86_reg dst, int imm ) in x86_mov_imm() argument
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/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/
DSystemZInstrFP.td29 def SelectF32 : Pseudo<(outs FP32:$dst), (ins FP32:$src1, FP32:$src2, i8imm:$cc),
31 [(set FP32:$dst,
33 def SelectF64 : Pseudo<(outs FP64:$dst), (ins FP64:$src1, FP64:$src2, i8imm:$cc),
35 [(set FP64:$dst,
44 def LD_Fp032 : Pseudo<(outs FP32:$dst), (ins),
45 "lzer\t{$dst}",
46 [(set FP32:$dst, fpimm0)]>;
47 def LD_Fp064 : Pseudo<(outs FP64:$dst), (ins),
48 "lzdr\t{$dst}",
49 [(set FP64:$dst, fpimm0)]>;
[all …]
DSystemZInstrInfo.td79 def Select32 : Pseudo<(outs GR32:$dst), (ins GR32:$src1, GR32:$src2, i8imm:$cc),
81 [(set GR32:$dst,
83 def Select64 : Pseudo<(outs GR64:$dst), (ins GR64:$src1, GR64:$src2, i8imm:$cc),
85 [(set GR64:$dst,
101 def JMP : Pseudo<(outs), (ins brtarget:$dst), "j\t{$dst}", [(br bb:$dst)]>;
104 def JMPr : Pseudo<(outs), (ins GR64:$dst), "br\t{$dst}", [(brind GR64:$dst)]>;
108 def JO : Pseudo<(outs), (ins brtarget:$dst),
109 "jo\t$dst",
110 [(SystemZbrcond bb:$dst, SYSTEMZ_COND_O, PSW)]>;
111 def JH : Pseudo<(outs), (ins brtarget:$dst),
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/external/deqp/framework/referencerenderer/
DrrVertexAttrib.cpp60 inline void readOrder (typename tcu::Vector<DstScalarType, 4>& dst, const int size, const void* ptr) in readOrder() argument
65 dst[Order::T0] = DstScalarType(aligned[0]); in readOrder()
66 if (size >= 2) dst[Order::T1] = DstScalarType(aligned[1]); in readOrder()
67 if (size >= 3) dst[Order::T2] = DstScalarType(aligned[2]); in readOrder()
68 if (size >= 4) dst[Order::T3] = DstScalarType(aligned[3]); in readOrder()
72 inline void readUnormOrder (tcu::Vec4& dst, const int size, const void* ptr) in readUnormOrder() argument
79 dst[Order::T0] = float(aligned[0]) / float(range); in readUnormOrder()
80 if (size >= 2) dst[Order::T1] = float(aligned[1]) / float(range); in readUnormOrder()
81 if (size >= 3) dst[Order::T2] = float(aligned[2]) / float(range); in readUnormOrder()
82 if (size >= 4) dst[Order::T3] = float(aligned[3]) / float(range); in readUnormOrder()
[all …]
/external/swiftshader/src/Shader/
DShaderCore.cpp498 void ShaderCore::mov(Vector4f &dst, const Vector4f &src, bool integerDestination) in mov() argument
502 dst.x = As<Float4>(RoundInt(src.x)); in mov()
503 dst.y = As<Float4>(RoundInt(src.y)); in mov()
504 dst.z = As<Float4>(RoundInt(src.z)); in mov()
505 dst.w = As<Float4>(RoundInt(src.w)); in mov()
509 dst = src; in mov()
513 void ShaderCore::neg(Vector4f &dst, const Vector4f &src) in neg() argument
515 dst.x = -src.x; in neg()
516 dst.y = -src.y; in neg()
517 dst.z = -src.z; in neg()
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/external/libvpx/libvpx/vpx_dsp/arm/
Dintrapred_neon.c26 static INLINE void dc_store_4x4(uint8_t *dst, ptrdiff_t stride, in dc_store_4x4() argument
30 for (i = 0; i < 4; ++i, dst += stride) { in dc_store_4x4()
31 vst1_lane_u32((uint32_t *)dst, vreinterpret_u32_u8(dc_dup), 0); in dc_store_4x4()
35 void vpx_dc_predictor_4x4_neon(uint8_t *dst, ptrdiff_t stride, in vpx_dc_predictor_4x4_neon() argument
45 dc_store_4x4(dst, stride, dc); in vpx_dc_predictor_4x4_neon()
48 void vpx_dc_left_predictor_4x4_neon(uint8_t *dst, ptrdiff_t stride, in vpx_dc_left_predictor_4x4_neon() argument
53 dc_store_4x4(dst, stride, dc); in vpx_dc_left_predictor_4x4_neon()
56 void vpx_dc_top_predictor_4x4_neon(uint8_t *dst, ptrdiff_t stride, in vpx_dc_top_predictor_4x4_neon() argument
61 dc_store_4x4(dst, stride, dc); in vpx_dc_top_predictor_4x4_neon()
64 void vpx_dc_128_predictor_4x4_neon(uint8_t *dst, ptrdiff_t stride, in vpx_dc_128_predictor_4x4_neon() argument
[all …]
/external/libvpx/libvpx/vpx_dsp/ppc/
Dintrapred_vsx.c14 void vpx_v_predictor_16x16_vsx(uint8_t *dst, ptrdiff_t stride, in vpx_v_predictor_16x16_vsx() argument
20 for (i = 0; i < 16; i++, dst += stride) { in vpx_v_predictor_16x16_vsx()
21 vec_vsx_st(d, 0, dst); in vpx_v_predictor_16x16_vsx()
25 void vpx_v_predictor_32x32_vsx(uint8_t *dst, ptrdiff_t stride, in vpx_v_predictor_32x32_vsx() argument
32 for (i = 0; i < 32; i++, dst += stride) { in vpx_v_predictor_32x32_vsx()
33 vec_vsx_st(d0, 0, dst); in vpx_v_predictor_32x32_vsx()
34 vec_vsx_st(d1, 16, dst); in vpx_v_predictor_32x32_vsx()
40 void vpx_h_predictor_4x4_vsx(uint8_t *dst, ptrdiff_t stride, in vpx_h_predictor_4x4_vsx() argument
50 vec_vsx_st(vec_sel(v0, vec_vsx_ld(0, dst), (uint8x16_t)mask4), 0, dst); in vpx_h_predictor_4x4_vsx()
51 dst += stride; in vpx_h_predictor_4x4_vsx()
[all …]

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