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/external/google-breakpad/src/processor/testdata/symbols/microdump/breakpad_unittests/D6D1FEC9A15DE7F38A236898871A2E770/
Dbreakpad_unittests.sym58084 STACK CFI INIT 2351c 4 .cfa: sp 0 + .ra: x30
58085 STACK CFI INIT 23520 4 .cfa: sp 0 + .ra: x30
58086 STACK CFI INIT 23524 8 .cfa: sp 0 + .ra: x30
58087 STACK CFI INIT 2352c 8 .cfa: sp 0 + .ra: x30
58088 STACK CFI INIT 23534 8 .cfa: sp 0 + .ra: x30
58089 STACK CFI INIT 2353c 8 .cfa: sp 0 + .ra: x30
58090 STACK CFI INIT 23544 8 .cfa: sp 0 + .ra: x30
58091 STACK CFI INIT 2354c 8 .cfa: sp 0 + .ra: x30
58092 STACK CFI INIT 23554 4 .cfa: sp 0 + .ra: x30
58093 STACK CFI INIT 23558 8 .cfa: sp 0 + .ra: x30
[all …]
/external/google-breakpad/src/processor/testdata/symbols/microdump/breakpad_unittests/DA7778FB66018A4E9B4110ED06E730D00/
Dbreakpad_unittests.sym55150 STACK CFI INIT 15dc4 2 .cfa: sp 0 + .ra: lr
55151 STACK CFI INIT 15dc6 2 .cfa: sp 0 + .ra: lr
55152 STACK CFI INIT 15dc8 4 .cfa: sp 0 + .ra: lr
55153 STACK CFI INIT 15dcc 4 .cfa: sp 0 + .ra: lr
55154 STACK CFI INIT 15dd0 4 .cfa: sp 0 + .ra: lr
55155 STACK CFI INIT 15dd4 4 .cfa: sp 0 + .ra: lr
55156 STACK CFI INIT 15dd8 4 .cfa: sp 0 + .ra: lr
55157 STACK CFI INIT 15ddc 6 .cfa: sp 0 + .ra: lr
55158 STACK CFI INIT 15de2 2 .cfa: sp 0 + .ra: lr
55159 STACK CFI INIT 15dc8 4 .cfa: sp 0 + .ra: lr
[all …]
/external/google-breakpad/src/processor/testdata/symbols/libc-2.13.so/F4F8DFCD5A5FB5A7CE64717E9E6AE3890/
Dlibc-2.13.so.sym1712 STACK CFI INIT 1eaf0 90 .cfa: $rsp 16 + .ra: .cfa -8 + ^
1714 STACK CFI INIT 1eb80 2 .cfa: $rsp 8 + .ra: .cfa -8 + ^
1715 STACK CFI INIT 1eb90 9 .cfa: $rsp 8 + .ra: .cfa -8 + ^
1717 STACK CFI INIT 1eba0 210 .cfa: $rsp 8 + .ra: .cfa -8 + ^
1721 STACK CFI INIT 1edb0 1c7 .cfa: $rsp 8 + .ra: .cfa -8 + ^
1725 STACK CFI INIT 1ef80 8 .cfa: $rsp 8 + .ra: .cfa -8 + ^
1726 STACK CFI INIT 1ef90 8 .cfa: $rsp 8 + .ra: .cfa -8 + ^
1727 STACK CFI INIT 1efa0 16 .cfa: $rsp 8 + .ra: .cfa -8 + ^
1728 STACK CFI INIT 1efc0 10 .cfa: $rsp 8 + .ra: .cfa -8 + ^
1730 STACK CFI INIT 1efd0 c3 .cfa: $rsp 8 + .ra: .cfa -8 + ^
[all …]
/external/jemalloc/test/unit/
Dprng.c6 uint32_t sa, sb, ra, rb; in test_prng_lg_range_u32() local
10 ra = prng_lg_range_u32(&sa, 32, atomic); in test_prng_lg_range_u32()
13 assert_u32_eq(ra, rb, in test_prng_lg_range_u32()
18 assert_u32_eq(ra, rb, in test_prng_lg_range_u32()
22 ra = prng_lg_range_u32(&sa, 32, atomic); in test_prng_lg_range_u32()
24 assert_u32_ne(ra, rb, in test_prng_lg_range_u32()
28 ra = prng_lg_range_u32(&sa, 32, atomic); in test_prng_lg_range_u32()
34 assert_u32_eq(rb, (ra >> (32 - lg_range)), in test_prng_lg_range_u32()
43 uint64_t sa, sb, ra, rb; in test_prng_lg_range_u64() local
47 ra = prng_lg_range_u64(&sa, 64); in test_prng_lg_range_u64()
[all …]
/external/google-breakpad/src/processor/testdata/symbols/ld-2.13.so/C32AD7E235EA6112E02A5B9D6219C4850/
Dld-2.13.so.sym17 STACK CFI INIT b40 8 .cfa: $rsp 8 + .ra: .cfa -8 + ^
18 STACK CFI INIT b50 5 .cfa: $rsp 8 + .ra: .cfa -8 + ^
19 STACK CFI INIT b60 5 .cfa: $rsp 8 + .ra: .cfa -8 + ^
20 STACK CFI INIT b70 69 .cfa: $rsp 8 + .ra: .cfa -8 + ^
24 STACK CFI INIT be0 49 .cfa: $rsp 8 + .ra: .cfa -8 + ^
28 STACK CFI INIT c30 4ed .cfa: $rsp 8 + .ra: .cfa -8 + ^
37 STACK CFI INIT 1120 600 .cfa: $rsp 8 + .ra: .cfa -8 + ^
41 STACK CFI INIT 1720 9b .cfa: $rsp 8 + .ra: .cfa -8 + ^
45 STACK CFI INIT 17c0 33 .cfa: $rsp 8 + .ra: .cfa -8 + ^
46 STACK CFI INIT 1800 31 .cfa: $rsp 8 + .ra: .cfa -8 + ^
[all …]
/external/v8/src/ppc/
Dassembler-ppc.cc224 MemOperand::MemOperand(Register ra, Register rb) { in MemOperand() argument
225 ra_ = ra; in MemOperand()
625 void Assembler::d_form(Instr instr, Register rt, Register ra, in d_form() argument
640 emit(instr | rt.code() * B21 | ra.code() * B16 | (kImm16Mask & val)); in d_form()
644 void Assembler::x_form(Instr instr, Register ra, Register rs, Register rb, in x_form() argument
646 emit(instr | rs.code() * B21 | ra.code() * B16 | rb.code() * B11 | r); in x_form()
649 void Assembler::xo_form(Instr instr, Register rt, Register ra, Register rb, in xo_form() argument
651 emit(instr | rt.code() * B21 | ra.code() * B16 | rb.code() * B11 | o | r); in xo_form()
663 void Assembler::md_form(Instr instr, Register ra, Register rs, int shift, in md_form() argument
670 emit(instr | rs.code() * B21 | ra.code() * B16 | sh0_4 * B11 | m0_4 * B6 | in md_form()
[all …]
Dsimulator-ppc.cc1686 int ra = instr->RAValue(); in ExecuteExt2_10bit() local
1691 set_register(ra, result); in ExecuteExt2_10bit()
1700 int ra = instr->RAValue(); in ExecuteExt2_10bit() local
1705 set_register(ra, result); in ExecuteExt2_10bit()
1714 int ra = instr->RAValue(); in ExecuteExt2_10bit() local
1716 uint32_t ra_val = get_register(ra); in ExecuteExt2_10bit()
1725 int ra = instr->RAValue(); in ExecuteExt2_10bit() local
1727 uint64_t ra_val = get_register(ra); in ExecuteExt2_10bit()
1736 int ra = instr->RAValue(); in ExecuteExt2_10bit() local
1738 int32_t ra_val = get_register(ra); in ExecuteExt2_10bit()
[all …]
/external/llvm/test/MC/Mips/
Dmicromips-loadstore-instructions.s30 # CHECK-EL: lwm32 $16, $17, $18, $19, $ra, 8($4) # encoding: [0x84,0x22,0…
31 # CHECK-EL: lwm32 $16, $17, $18, $19, $20, $21, $22, $23, $fp, $ra, 8($4) # encoding: [0x24,0x23,0…
32 # CHECK-EL: lwm32 $16, $17, $18, $19, $20, $21, $22, $23, $fp, $ra, 8($4) # encoding: [0x24,0x23,0…
35 # CHECK-EL: lwm16 $16, $17, $ra, 8($sp) # encoding: [0x12,0x45]
36 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
37 # CHECK-EL: lwm16 $16, $17, $ra, 8($sp) # encoding: [0x12,0x45]
38 # CHECK-EL: lwm32 $16, $17, $ra, 64($sp) # encoding: [0x5d,0x22,0x40,0x50]
39 # CHECK-EL: lwm32 $16, $17, $ra, 8($4) # encoding: [0x44,0x22,0x08,0x50]
41 # CHECK-EL: swm16 $16, $17, $ra, 8($sp) # encoding: [0x52,0x45]
42 # CHECK-EL: swm32 $16, $17, $ra, 64($sp) # encoding: [0x5d,0x22,0x40,0xd0]
[all …]
Delf-tls.s24 .frame $sp,24,$ra
34 sw $ra, 20($sp) # 4-byte Folded Spill
40 lw $ra, 20($sp) # 4-byte Folded Reload
41 jr $ra
56 .frame $sp,24,$ra
66 sw $ra, 20($sp) # 4-byte Folded Spill
72 lw $ra, 20($sp) # 4-byte Folded Reload
73 jr $ra
88 .frame $sp,24,$ra
98 sw $ra, 20($sp) # 4-byte Folded Spill
[all …]
Ddo_switch1.s19 .frame $sp,8,$ra
35 jr $ra
46 jr $ra
50 jr $ra
54 jr $ra
58 jr $ra
/external/llvm/test/CodeGen/Mips/llvm-ir/
Dret.ll23 ; Force the delay slot filler off to check that the sequence jr $ra; nop is
24 ; turned into jic 0, $ra.
31 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
32 ; R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JALR
33 ; R6C-DAG: jrc $ra # <MCInst #{{[0-9]+}} JIC
42 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
43 ; R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JALR
52 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
53 ; R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JALR
62 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
[all …]
/external/google-breakpad/src/processor/testdata/symbols/libgcc_s.so.1/18B180F90887D8F8B5C35D185444AF4C0/
Dlibgcc_s.so.1.sym129 STACK CFI INIT 2bb0 2c0 .cfa: $rsp 16 + .ra: .cfa -8 + ^
131 STACK CFI INIT 2fe0 4b .cfa: $rsp 8 + .ra: .cfa -8 + ^
132 STACK CFI INIT 3030 29 .cfa: $rsp 8 + .ra: .cfa -8 + ^
133 STACK CFI INIT 3060 67 .cfa: $rsp 8 + .ra: .cfa -8 + ^
134 STACK CFI INIT 30d0 67 .cfa: $rsp 8 + .ra: .cfa -8 + ^
135 STACK CFI INIT 3140 6a .cfa: $rsp 8 + .ra: .cfa -8 + ^
136 STACK CFI INIT 31b0 32 .cfa: $rsp 8 + .ra: .cfa -8 + ^
137 STACK CFI INIT 31f0 32 .cfa: $rsp 8 + .ra: .cfa -8 + ^
138 STACK CFI INIT 3230 2 .cfa: $rsp 8 + .ra: .cfa -8 + ^
139 STACK CFI INIT 3240 1e .cfa: $rsp 8 + .ra: .cfa -8 + ^
[all …]
/external/skia/third_party/lua/src/
Dlvm.c335 void luaV_objlen (lua_State *L, StkId ra, const TValue *rb) { in luaV_objlen() argument
342 setnvalue(ra, cast_num(luaH_getn(h))); /* else primitive len */ in luaV_objlen()
346 setnvalue(ra, cast_num(tsvalue(rb)->len)); in luaV_objlen()
356 callTM(L, tm, rb, rb, ra, 1); in luaV_objlen()
360 void luaV_arith (lua_State *L, StkId ra, const TValue *rb, in luaV_arith() argument
367 setnvalue(ra, res); in luaV_arith()
369 else if (!call_binTM(L, rb, rc, ra, op)) in luaV_arith()
402 StkId ra) { in pushclosure() argument
408 setclLvalue(L, ra, ncl); /* anchor new closure in stack */ in pushclosure()
525 setnvalue(ra, op(L, nb, nc)); \
[all …]
/external/syslinux/com32/lua/src/
Dlvm.c358 void luaV_objlen (lua_State *L, StkId ra, const TValue *rb) { in luaV_objlen() argument
365 setnvalue(ra, cast_num(luaH_getn(h))); /* else primitive len */ in luaV_objlen()
369 setnvalue(ra, cast_num(tsvalue(rb)->len)); in luaV_objlen()
379 callTM(L, tm, rb, rb, ra, 1); in luaV_objlen()
383 void luaV_arith (lua_State *L, StkId ra, const TValue *rb, in luaV_arith() argument
390 setnvalue(ra, res); in luaV_arith()
392 else if (!call_binTM(L, rb, rc, ra, op)) in luaV_arith()
425 StkId ra) { in pushclosure() argument
431 setclLvalue(L, ra, ncl); /* anchor new closure in stack */ in pushclosure()
548 setnvalue(ra, op(L, nb, nc)); \
[all …]
/external/llvm/test/CodeGen/ARM/
Darm-eabi.ll1 ; RUN: llc < %s -mtriple=arm-none-eabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EA…
2 ; RUN: llc < %s -mtriple=arm-none-eabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-…
3 ; RUN: llc < %s -mtriple=arm-none-androideabi -disable-post-ra -o - | FileCheck %s --check-prefix=C…
4 ; RUN: llc < %s -mtriple=arm-none-gnueabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK…
5 ; RUN: llc < %s -mtriple=arm-none-gnueabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHE…
6 ; RUN: llc < %s -mtriple=arm-none-musleabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHEC…
7 ; RUN: llc < %s -mtriple=arm-none-musleabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CH…
8 ; RUN: llc < %s -mtriple=arm-none-eabi -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-pref…
9 ; RUN: llc < %s -mtriple=arm-none-eabihf -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-pr…
10 ; RUN: llc < %s -mtriple=arm-none-androideabi -meabi=gnu -disable-post-ra -o - | FileCheck %s --che…
[all …]
/external/ltp/testcases/kernel/syscalls/ioctl/
Dioctl06.c34 unsigned long ra, rab, rao; in verify_ioctl() local
40 for (ra = 0; ra <= 4096; ra += 512) { in verify_ioctl()
41 SAFE_IOCTL(fd, BLKRASET, ra); in verify_ioctl()
44 if (ra == rab) in verify_ioctl()
45 tst_res(TPASS, "BLKRASET %lu read back correctly", ra); in verify_ioctl()
47 tst_res(TFAIL, "BLKRASET %lu read back %lu", ra, rab); in verify_ioctl()
/external/llvm/test/CodeGen/Mips/
Ds2rem.ll18 ; PIC: save $16, $17, $ra, [[FS:[0-9]+]]
19 ; STATIC: save $16, $ra, [[FS:[0-9]+]]
20 ; PIC: restore $16, $17, $ra, [[FS]]
21 ; STATIC: restore $16, $ra, [[FS]]
35 ; PIC: save $16, $17, $ra, $18, [[FS:[0-9]+]]
36 ; PIC: restore $16, $17, $ra, $18, [[FS]]
49 ; PIC: save $16, $17, $ra, $18, [[FS:[0-9]+]]
50 ; PIC: restore $16, $17, $ra, $18, [[FS]]
64 ; PIC: save $16, $17, $ra, $18, [[FS:[0-9]+]]
65 ; PIC: restore $16, $17, $ra, $18, [[FS]]
[all …]
Docteon.ll7 ; OCTEON: jr $ra
10 ; MIPS64: jr $ra
20 ; OCTEON: jr $ra
23 ; MIPS64: jr $ra
32 ; OCTEON: jr $ra
37 ; MIPS64: jr $ra
47 ; OCTEON: jr $ra
53 ; MIPS64: jr $ra
63 ; OCTEON: jr $ra
68 ; MIPS64: jr $ra
[all …]
Dlongbranch.ll44 ; CHECK: jr $ra
61 ; O32-NEXT: sw $ra, 0($sp)
66 ; O32-NEXT: addu $1, $ra, $1
67 ; O32-NEXT: lw $ra, 0($sp)
76 ; O32: jr $ra
92 ; N64-NEXT: sd $ra, 0($sp)
98 ; N64-NEXT: daddu $1, $ra, $1
99 ; N64-NEXT: ld $ra, 0($sp)
109 ; N64: jr $ra
127 ; MICROMIPS-NEXT: sw $ra, 0($sp)
[all …]
/external/dhcpcd-6.8.2/
Dipv6nd.h44 struct ra { struct
45 TAILQ_ENTRY(ra) next;
63 TAILQ_HEAD(ra_head, ra); argument
98 void ipv6nd_freedrop_ra(struct ra *, int);
99 #define ipv6nd_free_ra(ra) ipv6nd_freedrop_ra((ra), 0) argument
100 #define ipv6nd_drop_ra(ra) ipv6nd_freedrop_ra((ra), 1) argument
/external/icu/icu4c/source/data/zone/
Dsr_Latn.txt1027 ld{"Britanija letnje računanje vremena"}
1279 ld{"Akre letnje računanje vremena"}
1296 ld{"Zapadno-afričko letnje računanje vremena"}
1301 ld{"Aljaska, letnje računanje vremena"}
1306 ld{"Almati letnje računanje vremena"}
1311 ld{"Amazon letnje računanje vremena"}
1336 ld{"Anadir letnje računanje vremena"}
1341 ld{"Apija letnje računanje vremena"}
1346 ld{"Akvatau letnje računanje vremena"}
1351 ld{"Akutobe letnje računanje vremena"}
[all …]
/external/boringssl/src/crypto/perlasm/
Dppc-xlate.pl178 my ($f,$ra,$rs,$n,$b) = @_;
180 " rldicl $ra,$rs,$b,$n";
191 my ($f,$idx,$ra) = @_;
193 " or $ra,$ra,$ra";
195 " mtspr $idx,$ra";
209 my ($f, $vrt, $ra, $rb, $op) = @_;
210 " .long ".sprintf "0x%X",(31<<26)|($vrt<<21)|($ra<<16)|($rb<<11)|($op*2+1);
245 my ($f, $rt, $ra, $rb, $rc) = @_;
246 " .long ".sprintf "0x%X",(4<<26)|($rt<<21)|($ra<<16)|($rb<<11)|($rc<<6)|49;
249 my ($f, $rt, $ra, $rb, $rc) = @_;
[all …]
/external/google-breakpad/src/tools/windows/dump_syms/testdata/
Ddump_syms_regtest64.sym4172 STACK CFI INIT 1010 6a .cfa: $rsp .ra: .cfa 8 - ^
4174 STACK CFI INIT 10d0 36 .cfa: $rsp .ra: .cfa 8 - ^
4176 STACK CFI INIT 1110 26 .cfa: $rsp .ra: .cfa 8 - ^
4178 STACK CFI INIT 1180 39 .cfa: $rsp .ra: .cfa 8 - ^
4180 STACK CFI INIT 11bc 180 .cfa: $rsp .ra: .cfa 8 - ^
4182 STACK CFI INIT 133c 2c .cfa: $rsp .ra: .cfa 8 - ^
4184 STACK CFI INIT 1368 12 .cfa: $rsp .ra: .cfa 8 - ^
4186 STACK CFI INIT 137c 3d .cfa: $rsp .ra: .cfa 8 - ^
4188 STACK CFI INIT 13d0 67 .cfa: $rsp .ra: .cfa 8 - ^
4190 STACK CFI INIT 1438 6c .cfa: $rsp .ra: .cfa 8 - ^
[all …]
/external/llvm/test/CodeGen/MIR/Mips/
Dmemory-operands.mir41 callee-saved-register: '%ra' }
44 liveins: %a0, %ra
46 Save16 %ra, 24, implicit-def %sp, implicit %sp
57 …JumpLinkReg16 killed %v1, csr_o32, implicit-def %ra, implicit killed %t9, implicit %a0, implicit k…
59 %ra = Restore16 24, implicit-def %sp, implicit %sp
73 callee-saved-register: '%ra' }
80 liveins: %ra, %s2, %s0, %ra, %s2, %s0
82 SaveX16 %s0, %ra, %s2, 32, implicit-def %sp, implicit %sp
95 …JumpLinkReg16 killed %v1, csr_o32, implicit-def %ra, implicit %v0, implicit killed %gp, implicit-d…
99 …JumpLinkReg16 killed %v1, csr_mips16rethelper, implicit-def %ra, implicit killed %t9, implicit %v0…
[all …]
/external/mesa3d/src/compiler/nir/
Dnir_lower_double_ops.c119 nir_ssa_def *ra = nir_f2d(b, nir_frcp(b, nir_d2f(b, src_norm))); in lower_rcp() local
124 nir_ssa_def *new_exp = nir_isub(b, get_exponent(b, ra), in lower_rcp()
128 ra = set_exponent(b, ra, new_exp); in lower_rcp()
145 ra = nir_ffma(b, ra, nir_ffma(b, ra, src, nir_imm_double(b, -1)), ra); in lower_rcp()
146 ra = nir_ffma(b, ra, nir_ffma(b, ra, src, nir_imm_double(b, -1)), ra); in lower_rcp()
148 return fix_inv_result(b, ra, src, new_exp); in lower_rcp()
183 nir_ssa_def *ra = nir_f2d(b, nir_frsq(b, nir_d2f(b, src_norm))); in lower_sqrt_rsq() local
184 nir_ssa_def *new_exp = nir_isub(b, get_exponent(b, ra), half); in lower_sqrt_rsq()
185 ra = set_exponent(b, ra, new_exp); in lower_sqrt_rsq()
271 nir_ssa_def *h_0 = nir_fmul(b, one_half, ra); in lower_sqrt_rsq()
[all …]

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