Searched refs:ADDR_TM_1D_TILED_THICK (Results 1 – 4 of 4) sorted by relevance
176 ADDR_TM_1D_TILED_THICK = 3, ///< Linear array of 8x8x4 tiles enumerator
171 case ADDR_TM_1D_TILED_THICK: in DispatchComputeSurfaceInfo()338 if ((expTileMode == ADDR_TM_1D_TILED_THICK) && in ComputeSurfaceInfoMicroTiled()341 expTileMode = HwlDegradeThickTileMode(ADDR_TM_1D_TILED_THICK, expNumSlices, NULL); in ComputeSurfaceInfoMicroTiled()342 if (expTileMode != ADDR_TM_1D_TILED_THICK) in ComputeSurfaceInfoMicroTiled()1096 expTileMode = ADDR_TM_1D_TILED_THICK; in ComputeSurfaceMipLevelTileMode()1194 case ADDR_TM_1D_TILED_THICK: in HwlDegradeThickTileMode()1325 case ADDR_TM_1D_TILED_THICK: in DispatchComputeSurfaceAddrFromCoord()2073 case ADDR_TM_1D_TILED_THICK: in DispatchComputeSurfaceCoordFromAddr()
850 case ADDR_TM_1D_TILED_THICK: in HwlOverrideTileMode()1120 case ADDR_TM_1D_TILED_THICK: in HwlSetupTileInfo()1346 if ((m_tileTable[18].mode == ADDR_TM_1D_TILED_THICK) && in InitTileSettingTable()
2805 case ADDR_TM_1D_TILED_THICK: in ComputeSurfaceCoordFromAddrMicroTiled()3519 *pTileMode = thickness == 1 ? ADDR_TM_1D_TILED_THIN1 : ADDR_TM_1D_TILED_THICK; in DegradeBaseLevel()3534 *pTileMode = ADDR_TM_1D_TILED_THICK; in DegradeBaseLevel()