Searched refs:ADDR_TM_2D_TILED_THICK (Results 1 – 5 of 5) sorted by relevance
176 case ADDR_TM_2D_TILED_THICK: //fall through in DispatchComputeSurfaceInfo()1086 case ADDR_TM_2D_TILED_THICK: //fall through in ComputeSurfaceMipLevelTileMode()1198 case ADDR_TM_2D_TILED_THICK: in HwlDegradeThickTileMode()1214 expTileMode = ADDR_TM_2D_TILED_THICK; in HwlDegradeThickTileMode()1340 case ADDR_TM_2D_TILED_THICK: //fall through in DispatchComputeSurfaceAddrFromCoord()2091 case ADDR_TM_2D_TILED_THICK: //fall through in DispatchComputeSurfaceCoordFromAddr()2350 case ADDR_TM_2D_TILED_THICK: //fall through in ComputeSurfaceCoord2DFromBankPipe()2861 case ADDR_TM_2D_TILED_THICK: // fall through in ComputeBankFromCoord()2997 case ADDR_TM_2D_TILED_THICK: // fall through in ComputeBankRotation()
855 case ADDR_TM_2D_TILED_THICK: in HwlOverrideTileMode()1124 case ADDR_TM_2D_TILED_THICK: in HwlSetupTileInfo()1350 ADDR_ASSERT(m_tileTable[24].mode == ADDR_TM_2D_TILED_THICK); in InitTileSettingTable()
2794 tileMode = ADDR_TM_2D_TILED_THICK; in HwlOverrideTileMode()2798 tileMode = ADDR_TM_2D_TILED_THICK; in HwlOverrideTileMode()
180 ADDR_TM_2D_TILED_THICK = 7, ///< A set of macro tiles consist of 8x8x4 tiles enumerator
3575 tileMode = ADDR_TM_2D_TILED_THICK; in DegradeLargeThickTile()3579 case ADDR_TM_2D_TILED_THICK: in DegradeLargeThickTile()