/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 623 ATOMIC_LOAD_AND, enumerator
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D | SelectionDAGNodes.h | 971 N->getOpcode() == ISD::ATOMIC_LOAD_AND || 1056 N->getOpcode() == ISD::ATOMIC_LOAD_AND ||
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/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 730 ATOMIC_LOAD_AND, enumerator
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D | SelectionDAGNodes.h | 1105 N->getOpcode() == ISD::ATOMIC_LOAD_AND || 1186 N->getOpcode() == ISD::ATOMIC_LOAD_AND ||
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 69 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; in getOperationName()
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D | LegalizeIntegerTypes.cpp | 144 case ISD::ATOMIC_LOAD_AND: in PromoteIntegerResult() 1339 case ISD::ATOMIC_LOAD_AND: in ExpandIntegerResult()
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D | SelectionDAG.cpp | 468 case ISD::ATOMIC_LOAD_AND: in AddNodeIDCustom() 4910 Opcode == ISD::ATOMIC_LOAD_AND || in getAtomic()
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D | LegalizeDAG.cpp | 3769 case ISD::ATOMIC_LOAD_AND: in ConvertNodeToLibcall()
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D | SelectionDAGBuilder.cpp | 3937 case AtomicRMWInst::And: NT = ISD::ATOMIC_LOAD_AND; break; in visitAtomicRMW()
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/external/llvm/lib/Target/Mips/ |
D | Mips16ISelLowering.cpp | 136 setOperationAction(ISD::ATOMIC_LOAD_AND, MVT::i32, Expand); in Mips16TargetLowering()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86ISelDAGToDAG.cpp | 1581 case ISD::ATOMIC_LOAD_AND: in SelectAtomicLoadArith() 1752 case ISD::ATOMIC_LOAD_AND: in Select()
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D | X86ISelLowering.cpp | 487 setOperationAction(ISD::ATOMIC_LOAD_AND, MVT::i64, Custom); in X86TargetLowering() 10595 case ISD::ATOMIC_LOAD_AND: in ReplaceNodeResults()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | LegalizeIntegerTypes.cpp | 126 case ISD::ATOMIC_LOAD_AND: in PromoteIntegerResult() 1120 case ISD::ATOMIC_LOAD_AND: in ExpandIntegerResult() 1211 case ISD::ATOMIC_LOAD_AND: in ExpandAtomic()
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D | SelectionDAG.cpp | 428 case ISD::ATOMIC_LOAD_AND: in AddNodeIDCustom() 3932 Opcode == ISD::ATOMIC_LOAD_AND || in getAtomic() 5880 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; in getOperationName()
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D | LegalizeDAG.cpp | 2921 case ISD::ATOMIC_LOAD_AND: in ExpandAtomic() 3048 case ISD::ATOMIC_LOAD_AND: in ExpandNode()
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D | DAGCombiner.cpp | 7131 case ISD::ATOMIC_LOAD_AND: in visitMEMBARRIER() 7157 case ISD::ATOMIC_LOAD_AND: in visitMEMBARRIER()
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D | SelectionDAGBuilder.cpp | 3365 case AtomicRMWInst::And: NT = ISD::ATOMIC_LOAD_AND; break; in visitAtomicRMW()
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/external/llvm/lib/Target/AMDGPU/ |
D | SIISelLowering.cpp | 246 setTargetDAGCombine(ISD::ATOMIC_LOAD_AND); in SITargetLowering() 3012 case ISD::ATOMIC_LOAD_AND: in PerformDAGCombine()
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/external/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 744 OP_TO_LIBCALL(ISD::ATOMIC_LOAD_AND, SYNC_FETCH_AND_AND) in getSYNC()
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/external/swiftshader/third_party/LLVM/include/llvm/Target/ |
D | TargetSelectionDAG.td | 424 def atomic_load_and : SDNode<"ISD::ATOMIC_LOAD_AND" , SDTAtomic2,
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/external/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 504 def atomic_load_and : SDNode<"ISD::ATOMIC_LOAD_AND" , SDTAtomic2,
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 627 setOperationAction(ISD::ATOMIC_LOAD_AND, MVT::i64, Custom); in ARMTargetLowering() 642 setOperationAction(ISD::ATOMIC_LOAD_AND, MVT::i32, Expand); in ARMTargetLowering() 5012 case ISD::ATOMIC_LOAD_AND: in ReplaceNodeResults()
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.cpp | 207 setOperationAction(ISD::ATOMIC_LOAD_AND, MVT::i32, Custom); in SystemZTargetLowering() 4539 case ISD::ATOMIC_LOAD_AND: in LowerOperation()
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 444 setOperationAction(ISD::ATOMIC_LOAD_AND, VT, Custom); in X86TargetLowering() 21189 case ISD::ATOMIC_LOAD_AND: in lowerAtomicArithWithLOCK() 21671 case ISD::ATOMIC_LOAD_AND: return lowerAtomicArith(Op, DAG, Subtarget); in LowerOperation() 22029 case ISD::ATOMIC_LOAD_AND: in ReplaceNodeResults()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 874 setOperationAction(ISD::ATOMIC_LOAD_AND, MVT::i32, Expand); in ARMTargetLowering()
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