Home
last modified time | relevance | path

Searched refs:ATOMIC_LOAD_AND (Results 1 – 25 of 26) sorted by relevance

12

/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DISDOpcodes.h623 ATOMIC_LOAD_AND, enumerator
DSelectionDAGNodes.h971 N->getOpcode() == ISD::ATOMIC_LOAD_AND ||
1056 N->getOpcode() == ISD::ATOMIC_LOAD_AND ||
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h730 ATOMIC_LOAD_AND, enumerator
DSelectionDAGNodes.h1105 N->getOpcode() == ISD::ATOMIC_LOAD_AND ||
1186 N->getOpcode() == ISD::ATOMIC_LOAD_AND ||
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp69 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; in getOperationName()
DLegalizeIntegerTypes.cpp144 case ISD::ATOMIC_LOAD_AND: in PromoteIntegerResult()
1339 case ISD::ATOMIC_LOAD_AND: in ExpandIntegerResult()
DSelectionDAG.cpp468 case ISD::ATOMIC_LOAD_AND: in AddNodeIDCustom()
4910 Opcode == ISD::ATOMIC_LOAD_AND || in getAtomic()
DLegalizeDAG.cpp3769 case ISD::ATOMIC_LOAD_AND: in ConvertNodeToLibcall()
DSelectionDAGBuilder.cpp3937 case AtomicRMWInst::And: NT = ISD::ATOMIC_LOAD_AND; break; in visitAtomicRMW()
/external/llvm/lib/Target/Mips/
DMips16ISelLowering.cpp136 setOperationAction(ISD::ATOMIC_LOAD_AND, MVT::i32, Expand); in Mips16TargetLowering()
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86ISelDAGToDAG.cpp1581 case ISD::ATOMIC_LOAD_AND: in SelectAtomicLoadArith()
1752 case ISD::ATOMIC_LOAD_AND: in Select()
DX86ISelLowering.cpp487 setOperationAction(ISD::ATOMIC_LOAD_AND, MVT::i64, Custom); in X86TargetLowering()
10595 case ISD::ATOMIC_LOAD_AND: in ReplaceNodeResults()
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DLegalizeIntegerTypes.cpp126 case ISD::ATOMIC_LOAD_AND: in PromoteIntegerResult()
1120 case ISD::ATOMIC_LOAD_AND: in ExpandIntegerResult()
1211 case ISD::ATOMIC_LOAD_AND: in ExpandAtomic()
DSelectionDAG.cpp428 case ISD::ATOMIC_LOAD_AND: in AddNodeIDCustom()
3932 Opcode == ISD::ATOMIC_LOAD_AND || in getAtomic()
5880 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; in getOperationName()
DLegalizeDAG.cpp2921 case ISD::ATOMIC_LOAD_AND: in ExpandAtomic()
3048 case ISD::ATOMIC_LOAD_AND: in ExpandNode()
DDAGCombiner.cpp7131 case ISD::ATOMIC_LOAD_AND: in visitMEMBARRIER()
7157 case ISD::ATOMIC_LOAD_AND: in visitMEMBARRIER()
DSelectionDAGBuilder.cpp3365 case AtomicRMWInst::And: NT = ISD::ATOMIC_LOAD_AND; break; in visitAtomicRMW()
/external/llvm/lib/Target/AMDGPU/
DSIISelLowering.cpp246 setTargetDAGCombine(ISD::ATOMIC_LOAD_AND); in SITargetLowering()
3012 case ISD::ATOMIC_LOAD_AND: in PerformDAGCombine()
/external/llvm/lib/CodeGen/
DTargetLoweringBase.cpp744 OP_TO_LIBCALL(ISD::ATOMIC_LOAD_AND, SYNC_FETCH_AND_AND) in getSYNC()
/external/swiftshader/third_party/LLVM/include/llvm/Target/
DTargetSelectionDAG.td424 def atomic_load_and : SDNode<"ISD::ATOMIC_LOAD_AND" , SDTAtomic2,
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td504 def atomic_load_and : SDNode<"ISD::ATOMIC_LOAD_AND" , SDTAtomic2,
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMISelLowering.cpp627 setOperationAction(ISD::ATOMIC_LOAD_AND, MVT::i64, Custom); in ARMTargetLowering()
642 setOperationAction(ISD::ATOMIC_LOAD_AND, MVT::i32, Expand); in ARMTargetLowering()
5012 case ISD::ATOMIC_LOAD_AND: in ReplaceNodeResults()
/external/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp207 setOperationAction(ISD::ATOMIC_LOAD_AND, MVT::i32, Custom); in SystemZTargetLowering()
4539 case ISD::ATOMIC_LOAD_AND: in LowerOperation()
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp444 setOperationAction(ISD::ATOMIC_LOAD_AND, VT, Custom); in X86TargetLowering()
21189 case ISD::ATOMIC_LOAD_AND: in lowerAtomicArithWithLOCK()
21671 case ISD::ATOMIC_LOAD_AND: return lowerAtomicArith(Op, DAG, Subtarget); in LowerOperation()
22029 case ISD::ATOMIC_LOAD_AND: in ReplaceNodeResults()
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp874 setOperationAction(ISD::ATOMIC_LOAD_AND, MVT::i32, Expand); in ARMTargetLowering()

12