| /external/vixl/test/aarch32/ |
| D | test-disasm-a32.cc | 626 COMPARE_T32(Adcs(r0, r0, Operand(r2, LSR, r3)), in TEST()
1526 COMPARE_BOTH(Adcs(r0, r1, -2), "sbcs r0, r1, #1\n"); in TEST()
2225 COMPARE_A32(Adcs(pc, r0, 1), "adcs pc, r0, #1\n"); in TEST()
2226 COMPARE_A32(Adcs(r0, pc, 1), "adcs r0, pc, #1\n"); in TEST()
2227 MUST_FAIL_TEST_T32(Adcs(pc, r0, 1), "Unpredictable instruction.\n"); in TEST()
2228 MUST_FAIL_TEST_T32(Adcs(r0, pc, 1), "Unpredictable instruction.\n"); in TEST()
2237 COMPARE_A32(Adcs(pc, r0, r1), "adcs pc, r0, r1\n"); in TEST()
2238 COMPARE_A32(Adcs(r0, pc, r1), "adcs r0, pc, r1\n"); in TEST()
2239 COMPARE_A32(Adcs(r0, r1, pc), "adcs r0, r1, pc\n"); in TEST()
2240 MUST_FAIL_TEST_T32(Adcs(pc, r0, r1), "Unpredictable instruction.\n"); in TEST()
[all …]
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| D | test-assembler-aarch32.cc | 292 __ Adcs(r3, r2, r1); in TEST() local
307 __ Adcs(r3, r2, Operand(r1, ASR, 31)); in TEST() local
322 __ Adcs(r3, r2, Operand(r1, LSR, 31)); in TEST() local
337 __ Adcs(r3, r2, Operand(r1, LSL, 4)); in TEST() local
352 __ Adcs(r3, r2, Operand(r1, ROR, 8)); in TEST() local
367 __ Adcs(r3, r2, Operand(r1, RRX)); in TEST() local
382 __ Adcs(r3, r2, Operand(r1, RRX)); in TEST() local
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| D | test-simulator-cond-rd-rn-operand-rm-t32.cc | 119 M(Adcs) \
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| D | test-simulator-cond-rd-rn-operand-rm-a32.cc | 119 M(Adcs) \
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| D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-a32.cc | 119 M(Adcs) \
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| D | test-simulator-cond-rd-rn-operand-const-a32.cc | 119 M(Adcs) \
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| D | test-simulator-cond-rd-rn-operand-const-t32.cc | 119 M(Adcs) \
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| D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-t32.cc | 119 M(Adcs) \
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| D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-a32.cc | 119 M(Adcs) \
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| D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-t32.cc | 119 M(Adcs) \
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| D | test-simulator-cond-rd-rn-operand-rm-shift-rs-a32.cc | 119 M(Adcs) \
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| /external/v8/src/arm64/ |
| D | macro-assembler-arm64-inl.h | 242 void MacroAssembler::Adcs(const Register& rd, in Adcs() function
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| D | macro-assembler-arm64.h | 234 inline void Adcs(const Register& rd,
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| /external/vixl/src/aarch64/ |
| D | macro-assembler-aarch64.cc | 1669 void MacroAssembler::Adcs(const Register& rd, in Adcs() function in vixl::aarch64::MacroAssembler
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| D | macro-assembler-aarch64.h | 652 void Adcs(const Register& rd, const Register& rn, const Operand& operand);
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| /external/vixl/src/aarch32/ |
| D | macro-assembler-aarch32.h | 1109 Adcs(cond, rd, rn, operand); in Adc()
1116 Adcs(cond, rd, rn, operand); in Adc()
1130 void Adcs(Condition cond, Register rd, Register rn, const Operand& operand) { in Adcs() function
1140 void Adcs(Register rd, Register rn, const Operand& operand) { in Adcs() function
1141 Adcs(al, rd, rn, operand); in Adcs()
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| /external/vixl/test/aarch64/ |
| D | test-assembler-aarch64.cc | 8303 AdcsSbcsHelper(&MacroAssembler::Adcs, in TEST()
8309 AdcsSbcsHelper(&MacroAssembler::Adcs, in TEST()
8493 AdcsSbcsHelper(&MacroAssembler::Adcs, in TEST()
8499 AdcsSbcsHelper(&MacroAssembler::Adcs, in TEST()
8658 __ Adcs(x10, x0, Operand(x1, SXTX, 1)); in TEST() local
8670 __ Adcs(x10, x0, Operand(x1, UXTB, 2)); in TEST() local
8681 __ Adcs(x10, x0, Operand(1)); in TEST() local
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