Searched refs:AddInst (Results 1 – 3 of 3) sorted by relevance
1398 MCInst AddInst; in EmitInstruction() local1399 AddInst.setOpcode(ARM::tADDhirr); in EmitInstruction()1400 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); in EmitInstruction()1401 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); in EmitInstruction()1402 AddInst.addOperand(MCOperand::CreateReg(ARM::PC)); in EmitInstruction()1404 AddInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()1405 AddInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()1406 OutStreamer.EmitInstruction(AddInst); in EmitInstruction()1421 MCInst AddInst; in EmitInstruction() local1422 AddInst.setOpcode(ARM::ADDrr); in EmitInstruction()[all …]
1144 const MCInstrDesc& AddInst = TII.get( isPPC64 ? PPC::ADD8 in emitEpilogue() local1239 BuildMI(MBB, MBBI, dl, AddInst) in emitEpilogue()1325 BuildMI(MBB, MBBI, dl, AddInst) in emitEpilogue()
1528 auto *AddInst = cast<BinaryOperator>(Op0->getOperand(0)); in SimplifyAndOfICmps() local1529 bool isNSW = AddInst->hasNoSignedWrap(); in SimplifyAndOfICmps()1530 bool isNUW = AddInst->hasNoUnsignedWrap(); in SimplifyAndOfICmps()1702 auto *AddInst = cast<BinaryOperator>(Op0->getOperand(0)); in SimplifyOrOfICmps() local1703 bool isNSW = AddInst->hasNoSignedWrap(); in SimplifyOrOfICmps()1704 bool isNUW = AddInst->hasNoUnsignedWrap(); in SimplifyOrOfICmps()