Searched refs:AddrBaseReg (Results 1 – 13 of 13) sorted by relevance
| /external/llvm/lib/Target/X86/ |
| D | X86OptimizeLEAs.cpp | 174 return MemOpKey(&MI.getOperand(N + X86::AddrBaseReg), in getMemOpKey()
330 if (TII->getRegClass(Desc, MemOpNo + X86::AddrBaseReg, TRI, *MF) != in chooseBestLEA()
424 if (!isIdenticalOp(MI.getOperand(MemOpNo + X86::AddrBaseReg), MO)) in isReplaceable()
430 if (i != (unsigned)(MemOpNo + X86::AddrBaseReg) && in isReplaceable()
520 MI.getOperand(MemOpNo + X86::AddrBaseReg) in removeRedundantAddrCalc()
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| D | X86AsmPrinter.cpp | 231 const MachineOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printLeaMemReference()
267 printOperand(P, MI, Op+X86::AddrBaseReg, O, Modifier); in printLeaMemReference()
296 const MachineOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printIntelMemReference()
312 printOperand(P, MI, Op+X86::AddrBaseReg, O, Modifier, AsmVariant); in printIntelMemReference()
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| D | X86FixupLEAs.cpp | 254 unsigned SrcReg = LEA.getOperand(1 + X86::AddrBaseReg).getReg(); in isLEASimpleIncOrDec()
307 MachineOperand &p = MI.getOperand(AddrOffset + X86::AddrBaseReg); in processInstruction()
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| D | X86CallFrameOptimization.cpp | 385 if (!I->getOperand(X86::AddrBaseReg).isReg() || in collectCallInfo()
386 (I->getOperand(X86::AddrBaseReg).getReg() != StackPtr) || in collectCallInfo()
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| D | X86InstrInfo.h | 125 MI.getOperand(Op + X86::AddrBaseReg).isReg() && in isLeaMem()
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| D | X86MCInstLower.cpp | 313 Inst.getOperand(AddrBase + X86::AddrBaseReg).isReg() && in SimplifyShortMoveForm()
338 (Inst.getOperand(AddrBase + X86::AddrBaseReg).getReg() != 0 || in SimplifyShortMoveForm()
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| D | X86InstrInfo.cpp | 2171 if (MI.getOperand(Op + X86::AddrBaseReg).isFI() && in isFrameOperand()
2178 FrameIndex = MI.getOperand(Op + X86::AddrBaseReg).getIndex(); in isFrameOperand()
2374 if (MI.getOperand(1 + X86::AddrBaseReg).isReg() && in isReallyTriviallyReMaterializable()
2379 unsigned BaseReg = MI.getOperand(1 + X86::AddrBaseReg).getReg(); in isReallyTriviallyReMaterializable()
2399 if (!MI.getOperand(1 + X86::AddrBaseReg).isReg()) in isReallyTriviallyReMaterializable()
2401 unsigned BaseReg = MI.getOperand(1 + X86::AddrBaseReg).getReg(); in isReallyTriviallyReMaterializable()
4716 MachineOperand &BaseMO = MemOp.getOperand(MemRefBegin + X86::AddrBaseReg); in getMemOpBaseRegImmOfs()
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| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCCodeEmitter.cpp | 60 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is16BitMemOperand()
206 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is32BitMemOperand()
225 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is64BitMemOperand()
355 const MCOperand &Base = MI.getOperand(Op+X86::AddrBaseReg); in emitMemModRMByte()
720 unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg); in EmitVEXOpcodePrefix()
766 unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg); in EmitVEXOpcodePrefix()
798 unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg); in EmitVEXOpcodePrefix()
996 REX |= isX86_64ExtendedReg(MI, MemOperand+X86::AddrBaseReg) << 0; // REX.B in DetermineREXPrefix()
1006 REX |= isX86_64ExtendedReg(MI, MemOperand+X86::AddrBaseReg) << 0; // REX.B in DetermineREXPrefix()
1016 REX |= isX86_64ExtendedReg(MI, MemOperand+X86::AddrBaseReg) << 0; // REX.B in DetermineREXPrefix()
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| D | X86BaseInfo.h | 33 AddrBaseReg = 0, enumerator
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| /external/llvm/lib/Target/X86/InstPrinter/ |
| D | X86IntelInstPrinter.cpp | 159 const MCOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printMemReference()
175 printOperand(MI, Op+X86::AddrBaseReg, O); in printMemReference()
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| D | X86ATTInstPrinter.cpp | 197 const MCOperand &BaseReg = MI->getOperand(Op + X86::AddrBaseReg); in printMemReference()
222 printOperand(MI, Op + X86::AddrBaseReg, O); in printMemReference()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/ |
| D | X86MCCodeEmitter.cpp | 162 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is32BitMemOperand()
247 const MCOperand &Base = MI.getOperand(Op+X86::AddrBaseReg); in EmitMemModRMByte()
505 if (X86II::isX86_64ExtendedReg(MI.getOperand(X86::AddrBaseReg).getReg())) in EmitVEXOpcodePrefix()
536 MI.getOperand(MemAddrOffset+X86::AddrBaseReg).getReg())) in EmitVEXOpcodePrefix()
549 if (X86II::isX86_64ExtendedReg(MI.getOperand(X86::AddrBaseReg).getReg())) in EmitVEXOpcodePrefix()
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| D | X86BaseInfo.h | 32 AddrBaseReg = 0, enumerator
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