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Searched refs:AddrReg (Results 1 – 11 of 11) sorted by relevance

/external/llvm/lib/Target/Mips/MCTargetDesc/
DMipsNaClELFStreamer.cpp93 void emitMask(unsigned AddrReg, unsigned MaskReg, in emitMask() argument
97 MaskInst.addOperand(MCOperand::createReg(AddrReg)); in emitMask()
98 MaskInst.addOperand(MCOperand::createReg(AddrReg)); in emitMask()
106 unsigned AddrReg = MI.getOperand(0).getReg(); in sandboxIndirectJump() local
109 emitMask(AddrReg, IndirectBranchMaskReg, STI); in sandboxIndirectJump()
/external/llvm/lib/Target/AMDGPU/
DR600InstrInfo.cpp1145 unsigned AddrReg; in buildIndirectWrite() local
1148 case 0: AddrReg = AMDGPU::R600_AddrRegClass.getRegister(Address); break; in buildIndirectWrite()
1149 case 1: AddrReg = AMDGPU::R600_Addr_YRegClass.getRegister(Address); break; in buildIndirectWrite()
1150 case 2: AddrReg = AMDGPU::R600_Addr_ZRegClass.getRegister(Address); break; in buildIndirectWrite()
1151 case 3: AddrReg = AMDGPU::R600_Addr_WRegClass.getRegister(Address); break; in buildIndirectWrite()
1158 AddrReg, ValueReg) in buildIndirectWrite()
1177 unsigned AddrReg; in buildIndirectRead() local
1180 case 0: AddrReg = AMDGPU::R600_AddrRegClass.getRegister(Address); break; in buildIndirectRead()
1181 case 1: AddrReg = AMDGPU::R600_Addr_YRegClass.getRegister(Address); break; in buildIndirectRead()
1182 case 2: AddrReg = AMDGPU::R600_Addr_ZRegClass.getRegister(Address); break; in buildIndirectRead()
[all …]
DSILoadStoreOptimizer.cpp200 const MachineOperand *AddrReg = TII->getNamedOperand(*I, AMDGPU::OpName::addr); in mergeRead2Pair() local
236 .addOperand(*AddrReg) // addr in mergeRead2Pair()
273 LiveInterval &AddrRegLI = LIS->getInterval(AddrReg->getReg()); in mergeRead2Pair()
DSIInstrInfo.cpp215 const MachineOperand *AddrReg = in getMemOpBaseRegImmOfs() local
218 BaseReg = AddrReg->getReg(); in getMemOpBaseRegImmOfs()
250 const MachineOperand *AddrReg = in getMemOpBaseRegImmOfs() local
252 BaseReg = AddrReg->getReg(); in getMemOpBaseRegImmOfs()
264 const MachineOperand *AddrReg = in getMemOpBaseRegImmOfs() local
266 if (!AddrReg) in getMemOpBaseRegImmOfs()
271 BaseReg = AddrReg->getReg(); in getMemOpBaseRegImmOfs()
290 const MachineOperand *AddrReg = getNamedOperand(LdSt, AMDGPU::OpName::addr); in getMemOpBaseRegImmOfs() local
291 BaseReg = AddrReg->getReg(); in getMemOpBaseRegImmOfs()
/external/syslinux/gpxe/src/include/gpxe/efi/IndustryStandard/
DPci22.h471 UINT16 AddrReg; member
/external/llvm/lib/Target/AArch64/InstPrinter/
DAArch64InstPrinter.cpp705 unsigned AddrReg = MI->getOperand(OpNum++).getReg(); in printInst() local
706 O << ", [" << getRegisterName(AddrReg) << ']'; in printInst()
/external/llvm/lib/Target/PowerPC/
DPPCFastISel.cpp1767 unsigned AddrReg = getRegForValue(I->getOperand(0)); in SelectIndirectBr() local
1768 if (AddrReg == 0) in SelectIndirectBr()
1772 .addReg(AddrReg); in SelectIndirectBr()
/external/llvm/lib/Target/AArch64/
DAArch64FastISel.cpp2421 unsigned AddrReg = getRegForValue(BI->getOperand(0)); in selectIndirectBr() local
2422 if (AddrReg == 0) in selectIndirectBr()
2427 AddrReg = constrainOperandRegClass(II, AddrReg, II.getNumDefs()); in selectIndirectBr()
2428 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II).addReg(AddrReg); in selectIndirectBr()
/external/llvm/lib/Target/ARM/
DARMFastISel.cpp1335 unsigned AddrReg = getRegForValue(I->getOperand(0)); in SelectIndirectBr() local
1336 if (AddrReg == 0) return false; in SelectIndirectBr()
1340 TII.get(Opc)).addReg(AddrReg)); in SelectIndirectBr()
/external/llvm/lib/Target/X86/
DX86FastISel.cpp3594 unsigned AddrReg = createResultReg(&X86::GR64RegClass); in X86MaterializeFP() local
3596 AddrReg) in X86MaterializeFP()
3600 addDirectMem(MIB, AddrReg); in X86MaterializeFP()
/external/llvm/lib/Target/Mips/
DMipsISelLowering.cpp2154 unsigned AddrReg = ABI.IsN64() ? Mips::V0_64 : Mips::V0; in lowerEH_RETURN() local
2156 Chain = DAG.getCopyToReg(Chain, DL, AddrReg, Handler, Chain.getValue(1)); in lowerEH_RETURN()
2159 DAG.getRegister(AddrReg, getPointerTy(MF.getDataLayout())), in lowerEH_RETURN()