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Searched refs:AddrTileInfoIn (Results 1 – 2 of 2) sorted by relevance

/external/mesa3d/src/amd/vulkan/winsys/amdgpu/
Dradv_amdgpu_surface.c301 ADDR_TILEINFO AddrTileInfoIn = {0}; in radv_amdgpu_winsys_surface_init() local
410 AddrTileInfoIn.banks = surf->num_banks; in radv_amdgpu_winsys_surface_init()
411 AddrTileInfoIn.bankWidth = surf->bankw; in radv_amdgpu_winsys_surface_init()
412 AddrTileInfoIn.bankHeight = surf->bankh; in radv_amdgpu_winsys_surface_init()
413 AddrTileInfoIn.macroAspectRatio = surf->mtilea; in radv_amdgpu_winsys_surface_init()
414 AddrTileInfoIn.tileSplitBytes = surf->tile_split; in radv_amdgpu_winsys_surface_init()
415 AddrTileInfoIn.pipeConfig = surf->pipe_config + 1; /* +1 compared to GB_TILE_MODE */ in radv_amdgpu_winsys_surface_init()
417 AddrSurfInfoIn.pTileInfo = &AddrTileInfoIn; in radv_amdgpu_winsys_surface_init()
491 AddrTileInfoIn.tileSplitBytes = surf->stencil_tile_split; in radv_amdgpu_winsys_surface_init()
/external/mesa3d/src/gallium/winsys/amdgpu/drm/
Damdgpu_surface.c315 ADDR_TILEINFO AddrTileInfoIn = {0}; in amdgpu_surface_init() local
444 AddrTileInfoIn.banks = surf->num_banks; in amdgpu_surface_init()
445 AddrTileInfoIn.bankWidth = surf->bankw; in amdgpu_surface_init()
446 AddrTileInfoIn.bankHeight = surf->bankh; in amdgpu_surface_init()
447 AddrTileInfoIn.macroAspectRatio = surf->mtilea; in amdgpu_surface_init()
448 AddrTileInfoIn.tileSplitBytes = surf->tile_split; in amdgpu_surface_init()
449 AddrTileInfoIn.pipeConfig = surf->pipe_config + 1; /* +1 compared to GB_TILE_MODE */ in amdgpu_surface_init()
451 AddrSurfInfoIn.pTileInfo = &AddrTileInfoIn; in amdgpu_surface_init()
533 AddrTileInfoIn.tileSplitBytes = surf->stencil_tile_split; in amdgpu_surface_init()