Searched refs:AndLHS (Results 1 – 8 of 8) sorted by relevance
/external/llvm/lib/Transforms/Scalar/ |
D | AlignmentFromAssumptions.cpp | 230 Value *AndLHS = CmpBO->getOperand(0); in extractAlignmentInfo() local 232 const SCEV *AndLHSSCEV = SE->getSCEV(AndLHS); in extractAlignmentInfo() 235 std::swap(AndLHS, AndRHS); in extractAlignmentInfo() 263 if (PtrToIntInst *PToI = dyn_cast<PtrToIntInst>(AndLHS)) { in extractAlignmentInfo()
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D | GuardWidening.cpp | 489 Value *AndLHS, *AndRHS; in parseRangeChecks() local 490 if (match(CheckCond, m_And(m_Value(AndLHS), m_Value(AndRHS)))) in parseRangeChecks() 491 return parseRangeChecks(AndLHS, Checks) && in parseRangeChecks()
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXISelDAGToDAG.cpp | 4936 SDValue AndLHS = LHS->getOperand(0); in tryBFE() local 4940 if (isa<ConstantSDNode>(AndLHS)) { in tryBFE() 4941 std::swap(AndLHS, AndRHS); in tryBFE() 4976 Val = AndLHS; in tryBFE()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64FastISel.cpp | 2209 const Value *AndLHS = AI->getOperand(0); in emitCompareAndBranch() local 2212 if (const auto *C = dyn_cast<ConstantInt>(AndLHS)) in emitCompareAndBranch() 2214 std::swap(AndLHS, AndRHS); in emitCompareAndBranch() 2219 LHS = AndLHS; in emitCompareAndBranch()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | DAGCombiner.cpp | 7571 SDValue AndLHS = N0->getOperand(0); in SimplifySelectCC() local 7578 getShiftAmountTy(AndLHS.getValueType())); in SimplifySelectCC() 7579 SDValue Shl = DAG.getNode(ISD::SHL, N0.getDebugLoc(), VT, AndLHS, ShlAmt); in SimplifySelectCC()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86ISelLowering.cpp | 8339 SDValue AndLHS = Op0; in LowerToBT() local 8340 if (AndRHS->getZExtValue() == 1 && AndLHS.getOpcode() == ISD::SRL) { in LowerToBT() 8341 LHS = AndLHS.getOperand(0); in LowerToBT() 8342 RHS = AndLHS.getOperand(1); in LowerToBT()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | DAGCombiner.cpp | 14305 SDValue AndLHS = N0->getOperand(0); in SimplifySelectCC() local 14311 DAG.getConstant(AndMask.countLeadingZeros(), SDLoc(AndLHS), in SimplifySelectCC() 14312 getShiftAmountTy(AndLHS.getValueType())); in SimplifySelectCC() 14313 SDValue Shl = DAG.getNode(ISD::SHL, SDLoc(N0), VT, AndLHS, ShlAmt); in SimplifySelectCC()
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 15021 SDValue AndLHS = Op0; in LowerToBT() local 15023 if (AndRHSVal == 1 && AndLHS.getOpcode() == ISD::SRL) { in LowerToBT() 15024 LHS = AndLHS.getOperand(0); in LowerToBT() 15025 RHS = AndLHS.getOperand(1); in LowerToBT() 15030 LHS = AndLHS; in LowerToBT() 20996 SDValue AndLHS = GetMask(V, APInt::getSplat(Len, APInt(8, 0x33))); in LowerVectorCTPOPBitmath() local 20999 V = DAG.getNode(ISD::ADD, DL, VT, AndLHS, AndRHS); in LowerVectorCTPOPBitmath()
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