Searched refs:AndRes (Results 1 – 2 of 2) sorted by relevance
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 891 unsigned AndRes = RegInfo.createVirtualRegister(RC); in EmitAtomicBinary() local
926 BuildMI(BB, dl, TII->get(Mips::AND), AndRes).addReg(OldVal).addReg(Incr); in EmitAtomicBinary()
928 .addReg(Mips::ZERO).addReg(AndRes); in EmitAtomicBinary()
973 unsigned AndRes = RegInfo.createVirtualRegister(RC); in EmitAtomicBinaryPartword() local
1054 BuildMI(BB, dl, TII->get(Mips::AND), AndRes).addReg(OldVal).addReg(Incr2); in EmitAtomicBinaryPartword()
1056 .addReg(Mips::ZERO).addReg(AndRes); in EmitAtomicBinaryPartword()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 1147 unsigned AndRes = RegInfo.createVirtualRegister(RC); in emitAtomicBinary() local
1180 BuildMI(BB, DL, TII->get(AND), AndRes).addReg(OldVal).addReg(Incr); in emitAtomicBinary()
1181 BuildMI(BB, DL, TII->get(NOR), StoreVal).addReg(ZERO).addReg(AndRes); in emitAtomicBinary()
1255 unsigned AndRes = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword() local
1351 BuildMI(BB, DL, TII->get(Mips::AND), AndRes).addReg(OldVal).addReg(Incr2); in emitAtomicBinaryPartword()
1353 .addReg(Mips::ZERO).addReg(AndRes); in emitAtomicBinaryPartword()
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