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Searched refs:ArgFlags (Results 1 – 25 of 36) sorted by relevance

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/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86GenCallingConv.inc11 ISD::ArgFlagsTy ArgFlags, CCState &State);
14 ISD::ArgFlagsTy ArgFlags, CCState &State);
17 ISD::ArgFlagsTy ArgFlags, CCState &State);
20 ISD::ArgFlagsTy ArgFlags, CCState &State);
23 ISD::ArgFlagsTy ArgFlags, CCState &State);
26 ISD::ArgFlagsTy ArgFlags, CCState &State);
29 ISD::ArgFlagsTy ArgFlags, CCState &State);
32 ISD::ArgFlagsTy ArgFlags, CCState &State);
35 ISD::ArgFlagsTy ArgFlags, CCState &State);
38 ISD::ArgFlagsTy ArgFlags, CCState &State);
[all …]
DX86FastISel.cpp1559 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in DoSelectCall() local
1563 ArgFlags.reserve(CS.arg_size()); in DoSelectCall()
1644 ArgFlags.push_back(Flags); in DoSelectCall()
1656 CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, CC_X86); in DoSelectCall()
1732 ISD::ArgFlagsTy Flags = ArgFlags[VA.getValNo()]; in DoSelectCall()
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DCallingConvLower.cpp45 ISD::ArgFlagsTy ArgFlags) { in HandleByVal() argument
46 unsigned Align = ArgFlags.getByValAlign(); in HandleByVal()
47 unsigned Size = ArgFlags.getByValSize(); in HandleByVal()
75 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; in AnalyzeFormalArguments() local
76 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) { in AnalyzeFormalArguments()
93 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in CheckReturn() local
94 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) in CheckReturn()
107 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeReturn() local
108 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) { in AnalyzeReturn()
125 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeCallOperands() local
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/external/llvm/lib/CodeGen/
DCallingConvLower.cpp47 ISD::ArgFlagsTy ArgFlags) { in HandleByVal() argument
48 unsigned Align = ArgFlags.getByValAlign(); in HandleByVal()
49 unsigned Size = ArgFlags.getByValSize(); in HandleByVal()
76 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; in AnalyzeFormalArguments() local
77 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) { in AnalyzeFormalArguments()
94 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in CheckReturn() local
95 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) in CheckReturn()
108 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeReturn() local
109 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) { in AnalyzeReturn()
126 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeCallOperands() local
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/external/llvm/lib/Target/X86/
DX86CallingConv.h27 ISD::ArgFlagsTy &ArgFlags, in CC_X86_32_VectorCallIndirect() argument
32 ArgFlags.setInReg(); in CC_X86_32_VectorCallIndirect()
49 ISD::ArgFlagsTy &ArgFlags, in CC_X86_32_MCUInReg() argument
62 if (ArgFlags.isSplit() || !PendingMembers.empty()) { in CC_X86_32_MCUInReg()
65 if (!ArgFlags.isSplitEnd()) in CC_X86_32_MCUInReg()
79 assert(ArgFlags.isSplitEnd()); in CC_X86_32_MCUInReg()
/external/llvm/lib/Target/AArch64/
DAArch64CallingConvention.h45 MVT LocVT, ISD::ArgFlagsTy &ArgFlags, in finishStackBlock() argument
50 unsigned Align = std::min(ArgFlags.getOrigAlign(), StackAlign); in finishStackBlock()
67 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_AArch64_Custom_Stack_Block() argument
75 if (!ArgFlags.isInConsecutiveRegsLast()) in CC_AArch64_Custom_Stack_Block()
78 return finishStackBlock(PendingMembers, LocVT, ArgFlags, State, 8); in CC_AArch64_Custom_Stack_Block()
86 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_AArch64_Custom_Block() argument
112 if (!ArgFlags.isInConsecutiveRegsLast()) in CC_AArch64_Custom_Block()
134 return finishStackBlock(PendingMembers, LocVT, ArgFlags, State, SlotAlign); in CC_AArch64_Custom_Block()
/external/llvm/lib/Target/ARM/
DARMCallingConv.h60 ISD::ArgFlagsTy &ArgFlags, in CC_ARM_APCS_Custom_f64() argument
114 ISD::ArgFlagsTy &ArgFlags, in CC_ARM_AAPCS_Custom_f64() argument
146 ISD::ArgFlagsTy &ArgFlags, in RetCC_ARM_APCS_Custom_f64() argument
157 ISD::ArgFlagsTy &ArgFlags, in RetCC_ARM_AAPCS_Custom_f64() argument
159 return RetCC_ARM_APCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, in RetCC_ARM_AAPCS_Custom_f64()
182 ISD::ArgFlagsTy &ArgFlags, in CC_ARM_AAPCS_Custom_Aggregate() argument
195 ArgFlags.getOrigAlign())); in CC_ARM_AAPCS_Custom_Aggregate()
197 if (!ArgFlags.isInConsecutiveRegsLast()) in CC_ARM_AAPCS_Custom_Aggregate()
DARMFastISel.cpp194 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags,
1873 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, in ProcessCallArgs() argument
1880 CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, in ProcessCallArgs()
2211 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in ARMEmitLibcall() local
2215 ArgFlags.reserve(I->getNumOperands()); in ARMEmitLibcall()
2232 ArgFlags.push_back(Flags); in ARMEmitLibcall()
2238 if (!ProcessCallArgs(Args, ArgRegs, ArgVTs, ArgFlags, in ARMEmitLibcall()
2321 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in SelectCall() local
2326 ArgFlags.reserve(arg_size); in SelectCall()
2366 ArgFlags.push_back(Flags); in SelectCall()
[all …]
DARMCallingConv.td14 CCIf<!strconcat("ArgFlags.getOrigAlign() == ", Align), A>;
133 CCIfType<[i32], CCIf<"ArgFlags.getOrigAlign() != 8",
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMCallingConv.h61 ISD::ArgFlagsTy &ArgFlags, in CC_ARM_APCS_Custom_f64() argument
109 ISD::ArgFlagsTy &ArgFlags, in CC_ARM_AAPCS_Custom_f64() argument
141 ISD::ArgFlagsTy &ArgFlags, in RetCC_ARM_APCS_Custom_f64() argument
152 ISD::ArgFlagsTy &ArgFlags, in RetCC_ARM_AAPCS_Custom_f64() argument
154 return RetCC_ARM_APCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, in RetCC_ARM_AAPCS_Custom_f64()
DARMFastISel.cpp195 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags,
1562 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, in ProcessCallArgs() argument
1568 CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, CCAssignFnForCall(CC, false)); in ProcessCallArgs()
1817 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in ARMEmitLibcall() local
1821 ArgFlags.reserve(I->getNumOperands()); in ARMEmitLibcall()
1838 ArgFlags.push_back(Flags); in ARMEmitLibcall()
1844 if (!ProcessCallArgs(Args, ArgRegs, ArgVTs, ArgFlags, RegArgs, CC, NumBytes)) in ARMEmitLibcall()
1915 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in SelectCall() local
1919 ArgFlags.reserve(CS.arg_size()); in SelectCall()
1950 ArgFlags.push_back(Flags); in SelectCall()
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DARMCallingConv.td18 CCIf<!strconcat("ArgFlags.getOrigAlign() == ", Align), A>;
118 "ArgFlags.getOrigAlign() != 8",
/external/llvm/include/llvm/Target/
DTargetCallingConv.td42 class CCIfByVal<CCAction A> : CCIf<"ArgFlags.isByVal()", A> {
47 class CCIfSwiftSelf<CCAction A> : CCIf<"ArgFlags.isSwiftSelf()", A> {
52 class CCIfSwiftError<CCAction A> : CCIf<"ArgFlags.isSwiftError()", A> {
57 class CCIfConsecutiveRegs<CCAction A> : CCIf<"ArgFlags.isInConsecutiveRegs()", A> {
66 class CCIfInReg<CCAction A> : CCIf<"ArgFlags.isInReg()", A> {}
70 class CCIfNest<CCAction A> : CCIf<"ArgFlags.isNest()", A> {}
74 class CCIfSplit<CCAction A> : CCIf<"ArgFlags.isSplit()", A> {}
78 class CCIfSRet<CCAction A> : CCIf<"ArgFlags.isSRet()", A> {}
/external/llvm/lib/Target/SystemZ/
DSystemZCallingConv.h91 ISD::ArgFlagsTy &ArgFlags, in CC_SystemZ_I128Indirect() argument
97 if (!ArgFlags.isSplit() && PendingMembers.empty()) in CC_SystemZ_I128Indirect()
105 if (!ArgFlags.isSplitEnd()) in CC_SystemZ_I128Indirect()
DSystemZCallingConv.td13 : CCIf<"ArgFlags.isSExt() || ArgFlags.isZExt()", A>;
/external/swiftshader/third_party/LLVM/include/llvm/Target/
DTargetCallingConv.td42 class CCIfByVal<CCAction A> : CCIf<"ArgFlags.isByVal()", A> {
51 class CCIfInReg<CCAction A> : CCIf<"ArgFlags.isInReg()", A> {}
55 class CCIfNest<CCAction A> : CCIf<"ArgFlags.isNest()", A> {}
59 class CCIfSplit<CCAction A> : CCIf<"ArgFlags.isSplit()", A> {}
63 class CCIfSRet<CCAction A> : CCIf<"ArgFlags.isSRet()", A> {}
/external/clang/include/clang/Basic/
DIdentifierTable.h636 ArgFlags = ZeroArg|OneArg enumerator
642 assert((InfoPtr & ArgFlags) == 0 &&"Insufficiently aligned IdentifierInfo"); in Selector()
648 assert((InfoPtr & ArgFlags) == 0 &&"Insufficiently aligned IdentifierInfo"); in Selector()
654 return reinterpret_cast<IdentifierInfo *>(InfoPtr & ~ArgFlags); in getAsIdentifierInfo()
658 return reinterpret_cast<MultiKeywordSelector *>(InfoPtr & ~ArgFlags); in getMultiKeywordSelector()
662 return InfoPtr & ArgFlags; in getIdentifierInfoFlag()
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DCallingConvLower.h136 ISD::ArgFlagsTy ArgFlags, CCState &State);
143 ISD::ArgFlagsTy &ArgFlags, CCState &State);
305 int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
/external/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp107 ISD::ArgFlagsTy ArgFlags, CCState &State);
112 ISD::ArgFlagsTy ArgFlags, CCState &State);
117 ISD::ArgFlagsTy ArgFlags, CCState &State);
122 ISD::ArgFlagsTy ArgFlags, CCState &State);
127 ISD::ArgFlagsTy ArgFlags, CCState &State);
132 ISD::ArgFlagsTy ArgFlags, CCState &State);
137 ISD::ArgFlagsTy ArgFlags, CCState &State);
142 ISD::ArgFlagsTy ArgFlags, CCState &State);
147 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_Hexagon_VarArg() argument
152 return CC_Hexagon(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State); in CC_Hexagon_VarArg()
[all …]
/external/llvm/include/llvm/CodeGen/
DCallingConvLower.h177 ISD::ArgFlagsTy ArgFlags, CCState &State);
184 ISD::ArgFlagsTy &ArgFlags, CCState &State);
449 int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.h947 ISD::ArgFlagsTy &ArgFlags,
953 ISD::ArgFlagsTy &ArgFlags,
959 ISD::ArgFlagsTy &ArgFlags,
DPPCFastISel.cpp183 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags,
1280 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, in processCallArgs() argument
1292 CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, CC_PPC64_ELF_FIS); in processCallArgs()
1511 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in fastLowerCall() local
1516 ArgFlags.reserve(NumArgs); in fastLowerCall()
1542 ArgFlags.push_back(Flags); in fastLowerCall()
1549 if (!processCallArgs(Args, ArgRegs, ArgVTs, ArgFlags, in fastLowerCall()
/external/llvm/lib/Target/MSP430/
DMSP430ISelLowering.cpp297 ISD::ArgFlagsTy ArgFlags = Args[ValNo].Flags; in AnalyzeArguments() local
304 if (ArgFlags.isSExt()) in AnalyzeArguments()
306 else if (ArgFlags.isZExt()) in AnalyzeArguments()
313 if (ArgFlags.isByVal()) { in AnalyzeArguments()
314 State.HandleByVal(ValNo++, ArgVT, LocVT, LocInfo, 2, 2, ArgFlags); in AnalyzeArguments()
335 CC_MSP430_AssignStack(ValNo++, ArgVT, LocVT, LocInfo, ArgFlags, State); in AnalyzeArguments()
/external/llvm/lib/Target/Mips/
DMipsISelLowering.cpp2451 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, in CC_MipsO32() argument
2460 if (ArgFlags.isByVal()) in CC_MipsO32()
2464 if (ArgFlags.isInReg() && !Subtarget.isLittle()) { in CC_MipsO32()
2467 if (ArgFlags.isSExt()) in CC_MipsO32()
2469 else if (ArgFlags.isZExt()) in CC_MipsO32()
2479 if (ArgFlags.isSExt()) in CC_MipsO32()
2481 else if (ArgFlags.isZExt()) in CC_MipsO32()
2494 unsigned OrigAlign = ArgFlags.getOrigAlign(); in CC_MipsO32()
2541 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP32() argument
2544 return CC_MipsO32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State, F64Regs); in CC_MipsO32_FP32()
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/external/llvm/lib/Target/AMDGPU/
DAMDGPUCallingConv.td15 class CCIfNotInReg<CCAction A> : CCIf<"!ArgFlags.isInReg()", A> {}

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