Searched refs:AssignedRegs (Results 1 – 2 of 2) sorted by relevance
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGBuilder.cpp | 5593 RegsForValue AssignedRegs; member in __anonaf03ebfb0211::SDISelAsmOperandInfo
5606 for (unsigned i = 0, e = AssignedRegs.Regs.size(); i != e; ++i) in MarkAllocatedRegs()
5607 MarkRegAndAliases(AssignedRegs.Regs[i], OutputRegs, TRI); in MarkAllocatedRegs()
5610 for (unsigned i = 0, e = AssignedRegs.Regs.size(); i != e; ++i) in MarkAllocatedRegs()
5611 MarkRegAndAliases(AssignedRegs.Regs[i], InputRegs, TRI); in MarkAllocatedRegs()
5792 OpInfo.AssignedRegs = RegsForValue(Regs, RegVT, ValueVT); in GetRegistersForValue()
5810 OpInfo.AssignedRegs = RegsForValue(Regs, RegVT, ValueVT); in GetRegistersForValue()
6055 if (OpInfo.AssignedRegs.Regs.empty()) in visitInlineAsm()
6062 IndirectStoresToEmit.push_back(std::make_pair(OpInfo.AssignedRegs, in visitInlineAsm()
6068 RetValRegs.append(OpInfo.AssignedRegs); in visitInlineAsm()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGBuilder.cpp | 6395 RegsForValue AssignedRegs; member in __anone7f53fcf0311::SDISelAsmOperandInfo
6538 OpInfo.AssignedRegs = RegsForValue(Regs, RegVT, ValueVT); in GetRegistersForValue()
6554 OpInfo.AssignedRegs = RegsForValue(Regs, RegVT, ValueVT); in GetRegistersForValue()
6838 if (OpInfo.AssignedRegs.Regs.empty()) { in visitInlineAsm()
6848 IndirectStoresToEmit.push_back(std::make_pair(OpInfo.AssignedRegs, in visitInlineAsm()
6854 RetValRegs.append(OpInfo.AssignedRegs); in visitInlineAsm()
6859 OpInfo.AssignedRegs in visitInlineAsm()
6999 if (OpInfo.AssignedRegs.Regs.empty()) { in visitInlineAsm()
7007 OpInfo.AssignedRegs.getCopyToRegs(InOperandVal, DAG, dl, in visitInlineAsm()
7010 OpInfo.AssignedRegs.AddInlineAsmOperands(InlineAsm::Kind_RegUse, false, 0, in visitInlineAsm()
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