| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | brw_vec4_live_variables.cpp | 82 if (!BITSET_TEST(bd->def, v)) in setup_def_use()
90 !BITSET_TEST(bd->flag_def, c)) { in setup_def_use()
105 if (!BITSET_TEST(bd->use, v)) in setup_def_use()
114 !BITSET_TEST(bd->flag_use, c)) { in setup_def_use()
294 if (BITSET_TEST(bd->livein, i)) { in calculate_live_intervals()
299 if (BITSET_TEST(bd->liveout, i)) { in calculate_live_intervals()
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| D | brw_vec4_dead_code_eliminate.cpp | 64 result_live[c] |= BITSET_TEST(live, v); in dead_code_eliminate()
69 result_live[c] = BITSET_TEST(flag_live, c); in dead_code_eliminate()
104 combined_live |= BITSET_TEST(flag_live, c); in dead_code_eliminate()
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| D | brw_fs_live_variables.cpp | 69 if (!BITSET_TEST(bd->def, var)) in setup_one_read()
87 if (!BITSET_TEST(bd->use, var)) in setup_one_write()
215 if (BITSET_TEST(bd->livein, i)) { in compute_start_end()
220 if (BITSET_TEST(bd->liveout, i)) { in compute_start_end()
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| D | brw_schedule_instructions.cpp | 635 if (BITSET_TEST(v->live_intervals->block_data[block].livein, i)) { in setup_liveness()
637 if (!BITSET_TEST(livein[block], vgrf)) { in setup_liveness()
643 if (BITSET_TEST(v->live_intervals->block_data[block].liveout, i)) in setup_liveness()
656 if (!BITSET_TEST(livein[block + 1], i)) { in setup_liveness()
716 if (!BITSET_TEST(livein[block_idx], inst->dst.nr) && in get_register_pressure_benefit()
726 !BITSET_TEST(liveout[block_idx], inst->src[i].nr) && in get_register_pressure_benefit()
734 if (!BITSET_TEST(hw_liveout[block_idx], reg) && in get_register_pressure_benefit()
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| D | brw_fs_dead_code_eliminate.cpp | 96 result_live |= BITSET_TEST(live, var + i); in dead_code_eliminate()
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| D | brw_fs_copy_propagation.cpp | 851 if (BITSET_TEST(dataflow.bd[block->num].livein, i)) { in opt_copy_propagation()
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| /external/mesa3d/src/gallium/drivers/vc4/ |
| D | vc4_qir_live_variables.c | 73 if (!BITSET_TEST(block->def, var)) in qir_setup_use()
113 if (BITSET_TEST(block->use, var) || BITSET_TEST(block->def, var)) in qir_setup_def()
282 if (BITSET_TEST(block->live_in, i)) { in qir_compute_start_end()
289 if (BITSET_TEST(block->live_out, i)) { in qir_compute_start_end()
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| D | vc4_qir_schedule.c | 438 !BITSET_TEST(state->temp_live, inst->src[i].index)) { in get_register_pressure_cost()
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| /external/mesa3d/src/compiler/nir/ |
| D | nir_worklist.c | 62 if (BITSET_TEST(w->blocks_present, block->index)) in nir_block_worklist_push_head()
104 if (BITSET_TEST(w->blocks_present, block->index)) in nir_block_worklist_push_tail()
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| D | nir_liveness.c | 258 if (BITSET_TEST(instr->block->live_out, def->live_index)) { in nir_ssa_def_is_live_at()
264 if (BITSET_TEST(instr->block->live_in, def->live_index) || in nir_ssa_def_is_live_at()
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| D | nir_opt_dead_cf.c | 170 return !BITSET_TEST(after->live_in, def->live_index); in def_not_live_out()
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| D | nir_validate.c | 289 validate_assert(state, !BITSET_TEST(state->ssa_defs_found, def->index)); in validate_ssa_def()
861 validate_assert(state, !BITSET_TEST(state->regs_found, reg->index)); in prevalidate_reg_decl()
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| /external/mesa3d/src/util/ |
| D | register_allocate.c | 250 if (!BITSET_TEST(regs->regs[r1].conflicts, r2)) { in ra_add_reg_conflict()
332 return BITSET_TEST(c->regs, r); in reg_belongs_to_class()
454 if (!BITSET_TEST(g->nodes[n1].adjacency, n2)) { in ra_add_node_interference()
574 BITSET_TEST(g->regs->regs[r].conflicts, g->nodes[n2].reg)) { in ra_select()
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| D | bitset.h | 60 #define BITSET_TEST(x, b) ((x)[BITSET_BITWORD(b)] & BITSET_BIT(b)) macro
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| /external/mesa3d/src/compiler/glsl/ |
| D | ir_array_refcount.h | 97 return BITSET_TEST(bits, linearized_index); in is_linearized_index_referenced()
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| /external/mesa3d/src/gallium/drivers/freedreno/ir3/ |
| D | ir3_ra.c | 623 if (!BITSET_TEST(bd->def, name)) \ in ra_block_compute_live_ranges()
709 debug_assert(!BITSET_TEST(bd->use, name)); in ra_block_compute_live_ranges()
821 if (BITSET_TEST(bs, i)) { in print_bitset()
871 if (BITSET_TEST(bd->livein, i)) { in ra_add_interference()
876 if (BITSET_TEST(bd->liveout, i)) { in ra_add_interference()
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| /external/mesa3d/src/mesa/main/ |
| D | texstate.c | 624 if (BITSET_TEST(enabled_texture_units, unit)) in update_ff_texture_state()
739 if (!BITSET_TEST(enabled_texture_units, i)) in update_texture_state()
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| /external/mesa3d/src/intel/vulkan/ |
| D | anv_nir_apply_pipeline_layout.c | 363 if (!BITSET_TEST(state.set[set].used, binding)) in anv_nir_apply_pipeline_layout()
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