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Searched refs:BITSET_WORDS (Results 1 – 20 of 20) sorted by relevance

/external/mesa3d/src/util/
Dbitset.h45 #define BITSET_WORDS(bits) (((bits) + BITSET_WORDBITS - 1) / BITSET_WORDBITS) macro
46 #define BITSET_DECLARE(name, bits) BITSET_WORD name[BITSET_WORDS(bits)]
116 if (word >= BITSET_WORDS(size)) in __bitset_next_set()
Dregister_allocate.c197 BITSET_WORDS(count)); in ra_alloc_reg_set()
296 for (i = 0; i < BITSET_WORDS(regs->count); i++) in ra_make_reg_conflicts_transitive()
312 class->regs = rzalloc_array(class, BITSET_WORD, BITSET_WORDS(regs->count)); in ra_alloc_reg_class()
427 int bitset_count = BITSET_WORDS(count); in ra_alloc_interference_graph()
/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_fs_dead_code_eliminate.cpp81 BITSET_WORD *live = rzalloc_array(NULL, BITSET_WORD, BITSET_WORDS(num_vars)); in dead_code_eliminate()
86 sizeof(BITSET_WORD) * BITSET_WORDS(num_vars)); in dead_code_eliminate()
Dbrw_vec4_dead_code_eliminate.cpp47 BITSET_WORD *live = rzalloc_array(NULL, BITSET_WORD, BITSET_WORDS(num_vars)); in dead_code_eliminate()
52 sizeof(BITSET_WORD) * BITSET_WORDS(num_vars)); in dead_code_eliminate()
Dbrw_fs_live_variables.cpp257 bitset_words = BITSET_WORDS(num_vars); in fs_live_variables()
Dbrw_vec4_live_variables.cpp192 bitset_words = BITSET_WORDS(num_vars); in vec4_live_variables()
Dbrw_schedule_instructions.cpp451 BITSET_WORDS(grf_count)); in instruction_scheduler()
456 BITSET_WORDS(grf_count)); in instruction_scheduler()
461 BITSET_WORDS(hw_reg_count)); in instruction_scheduler()
Dbrw_fs_copy_propagation.cpp119 bitset_words = BITSET_WORDS(num_acp); in fs_copy_prop_dataflow()
/external/mesa3d/src/compiler/glsl/
Dir_array_refcount.cpp61 bits = new BITSET_WORD[BITSET_WORDS(num_bits)]; in ir_array_refcount_entry()
62 memset(bits, 0, BITSET_WORDS(num_bits) * sizeof(bits[0])); in ir_array_refcount_entry()
/external/mesa3d/src/compiler/nir/
Dnir_repair_ssa.c40 const unsigned num_words = BITSET_WORDS(state->impl->num_blocks); in prep_build_phi()
Dnir_worklist.c39 BITSET_WORDS(num_blocks)); in nir_block_worklist_init()
Dnir_validate.c1049 BITSET_WORDS(impl->reg_alloc) * in validate_function_impl()
1051 memset(state->regs_found, 0, BITSET_WORDS(impl->reg_alloc) * in validate_function_impl()
1059 BITSET_WORDS(impl->ssa_alloc) * in validate_function_impl()
1061 memset(state->ssa_defs_found, 0, BITSET_WORDS(impl->ssa_alloc) * in validate_function_impl()
1183 BITSET_WORDS(shader->reg_alloc) * in nir_validate_shader()
1185 memset(state.regs_found, 0, BITSET_WORDS(shader->reg_alloc) * in nir_validate_shader()
Dnir_liveness.c178 state.bitset_words = BITSET_WORDS(state.num_ssa_defs); in nir_live_ssa_defs_impl()
Dnir_lower_vars_to_ssa.c701 NIR_VLA(BITSET_WORD, store_blocks, BITSET_WORDS(state.impl->num_blocks)); in nir_lower_vars_to_ssa_impl()
708 BITSET_WORDS(state.impl->num_blocks) * sizeof(*store_blocks)); in nir_lower_vars_to_ssa_impl()
Dnir_lower_regs_to_ssa.c229 const unsigned block_set_words = BITSET_WORDS(impl->num_blocks); in nir_lower_regs_to_ssa_impl()
/external/mesa3d/src/gallium/drivers/vc4/
Dvc4_qir_live_variables.c302 int bitset_words = BITSET_WORDS(c->num_temps); in qir_calculate_live_intervals()
Dvc4_qir_schedule.c700 BITSET_WORDS(c->num_temps)); in qir_schedule_instructions_block()
/external/mesa3d/src/gallium/drivers/freedreno/ir3/
Dir3_ra.c609 unsigned bitset_words = BITSET_WORDS(ctx->alloc_count); in ra_block_compute_live_ranges()
773 unsigned bitset_words = BITSET_WORDS(ctx->alloc_count); in ra_compute_livein_liveout()
/external/mesa3d/src/intel/vulkan/
Danv_nir_apply_pipeline_layout.c281 const unsigned words = BITSET_WORDS(count); in anv_nir_apply_pipeline_layout()
/external/mesa3d/src/mesa/main/
Dperformance_monitor.c89 BITSET_WORDS(g->NumCounters)); in new_performance_monitor()