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Searched refs:ByteVT (Results 1 – 2 of 2) sorted by relevance

/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorOps.cpp876 EVT ByteVT = EVT::getVectorVT(*DAG.getContext(), MVT::i8, ShuffleMask.size()); in ExpandBSWAP() local
879 if (!TLI.isShuffleMaskLegal(ShuffleMask, ByteVT)) in ExpandBSWAP()
883 Op = DAG.getNode(ISD::BITCAST, DL, ByteVT, Op.getOperand(0)); in ExpandBSWAP()
884 Op = DAG.getVectorShuffle(ByteVT, DL, Op, DAG.getUNDEF(ByteVT), ShuffleMask); in ExpandBSWAP()
903 EVT ByteVT = EVT::getVectorVT(*DAG.getContext(), MVT::i8, BSWAPMask.size()); in ExpandBITREVERSE() local
904 if (TLI.isShuffleMaskLegal(BSWAPMask, ByteVT) && in ExpandBITREVERSE()
905 (TLI.isOperationLegalOrCustom(ISD::BITREVERSE, ByteVT) || in ExpandBITREVERSE()
906 (TLI.isOperationLegalOrCustom(ISD::SHL, ByteVT) && in ExpandBITREVERSE()
907 TLI.isOperationLegalOrCustom(ISD::SRL, ByteVT) && in ExpandBITREVERSE()
908 TLI.isOperationLegalOrCustomOrPromote(ISD::AND, ByteVT) && in ExpandBITREVERSE()
[all …]
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp7789 MVT ByteVT = MVT::getVectorVT(MVT::i8, 16 * NumLanes); in lowerVectorShuffleAsByteRotate() local
7790 Lo = DAG.getBitcast(ByteVT, Lo); in lowerVectorShuffleAsByteRotate()
7791 Hi = DAG.getBitcast(ByteVT, Hi); in lowerVectorShuffleAsByteRotate()
7802 VT, DAG.getNode(X86ISD::PALIGNR, DL, ByteVT, Lo, Hi, in lowerVectorShuffleAsByteRotate()
7810 assert(ByteVT == MVT::v16i8 && in lowerVectorShuffleAsByteRotate()
25282 MVT ByteVT = MVT::getVectorVT(MVT::i8, NumBytes); in combineX86ShuffleChain() local
25283 Res = DAG.getBitcast(ByteVT, Input); in combineX86ShuffleChain()
25285 SDValue PSHUFBMaskOp = DAG.getBuildVector(ByteVT, DL, PSHUFBMask); in combineX86ShuffleChain()
25287 Res = DAG.getNode(X86ISD::PSHUFB, DL, ByteVT, Res, PSHUFBMaskOp); in combineX86ShuffleChain()