1 /*
2 * Copyright 2012 Vadim Girlin <vadimgirlin@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Vadim Girlin
25 */
26
27 #ifndef R600_ISA_H_
28 #define R600_ISA_H_
29
30 #include "util/u_debug.h"
31
32 #ifdef __cplusplus
33 extern "C" {
34 #endif
35
36 /* ALU flags */
37 enum alu_op_flags
38 {
39 AF_V = (1<<0), /* allowed in vector slots */
40
41 /* allowed in scalar(trans) slot (slots xyz on cayman, may be replicated
42 * to w) */
43 AF_S = (1<<1),
44
45 AF_4SLOT = (1<<2), /* uses four vector slots (e.g. DOT4) */
46 AF_4V = (AF_V | AF_4SLOT),
47 AF_VS = (AF_V | AF_S), /* allowed in any slot */
48
49 AF_KILL = (1<<4),
50 AF_PRED = (1<<5),
51 AF_SET = (1<<6),
52
53 /* e.g. MUL_PREV instructions, allowed in x/y, depends on z/w */
54 AF_PREV_INTERLEAVE = (1<<7),
55
56 AF_MOVA = (1<<8), /* all MOVA instructions */
57 AF_IEEE = (1<<10),
58
59 AF_DST_TYPE_MASK = (3<<11),
60 AF_FLOAT_DST = 0,
61 AF_INT_DST = (1<<11),
62 AF_UINT_DST = (3<<11),
63
64 /* DP instructions, 2-slot pairs */
65 AF_64 = (1<<13),
66 /* 24 bit instructions */
67 AF_24 = (1<<14),
68 /* DX10 variants */
69 AF_DX10 = (1<<15),
70
71 /* result is replicated to all channels (only if AF_4V is also set -
72 * for special handling of MULLO_INT on CM) */
73 AF_REPL = (1<<16),
74
75 /* interpolation instructions */
76 AF_INTERP = (1<<17),
77
78 /* LDS instructions */
79 AF_LDS = (1<<20),
80
81 /* e.g. DOT - depends on the next slot in the same group (x<=y/y<=z/z<=w) */
82 AF_PREV_NEXT = (1<<21),
83
84 /* int<->flt conversions */
85 AF_CVT = (1<<22),
86
87 /* commutative operation on src0 and src1 ( a op b = b op a),
88 * includes MULADDs (considering the MUL part on src0 and src1 only) */
89 AF_M_COMM = (1 << 23),
90
91 /* associative operation ((a op b) op c) == (a op (b op c)),
92 * includes MULADDs (considering the MUL part on src0 and src1 only) */
93 AF_M_ASSOC = (1 << 24),
94
95 AF_PRED_PUSH = (1 << 25),
96
97 AF_ANY_PRED = (AF_PRED | AF_PRED_PUSH),
98
99 AF_CMOV = (1 << 26),
100
101 // for SETcc, PREDSETcc, ... - type of comparison
102 AF_CMP_TYPE_MASK = (3 << 27),
103 AF_FLOAT_CMP = 0,
104 AF_INT_CMP = (1 << 27),
105 AF_UINT_CMP = (3 << 27),
106
107 /* condition codes - 3 bits */
108 AF_CC_SHIFT = 29,
109 AF_CC_MASK = (7U << AF_CC_SHIFT),
110 AF_CC_E = (0U << AF_CC_SHIFT),
111 AF_CC_GT = (1U << AF_CC_SHIFT),
112 AF_CC_GE = (2U << AF_CC_SHIFT),
113 AF_CC_NE = (3U << AF_CC_SHIFT),
114 AF_CC_LT = (4U << AF_CC_SHIFT),
115 AF_CC_LE = (5U << AF_CC_SHIFT),
116 };
117
118 /* flags for FETCH instructions (TEX/VTX) */
119 enum fetch_op_flags
120 {
121 FF_GDS = (1<<0),
122 FF_TEX = (1<<1),
123
124 FF_SETGRAD = (1<<2),
125 FF_GETGRAD = (1<<3),
126 FF_USEGRAD = (1<<4),
127
128 FF_VTX = (1<<5),
129 FF_MEM = (1<<6),
130
131 FF_SET_TEXTURE_OFFSETS = (1<<7),
132 FF_USE_TEXTURE_OFFSETS = (1<<8),
133 };
134
135 /* flags for CF instructions */
136 enum cf_op_flags
137 {
138 CF_CLAUSE = (1<<0), /* execute clause (alu/fetch ...) */
139 CF_ACK = (1<<1), /* acked versions of some instructions */
140 CF_ALU = (1<<2), /* alu clause execution */
141 CF_ALU_EXT = (1<<3), /* ALU_EXTENDED */
142 CF_EXP = (1<<4), /* export (CF_ALLOC_EXPORT_WORD1_SWIZ) */
143 CF_BRANCH = (1<<5), /* branch instructions */
144 CF_LOOP = (1<<6), /* loop instructions */
145 CF_CALL = (1<<7), /* call instructions */
146 CF_MEM = (1<<8), /* export_mem (CF_ALLOC_EXPORT_WORD1_BUF) */
147 CF_FETCH = (1<<9), /* fetch clause */
148
149 CF_UNCOND = (1<<10), /* COND = ACTIVE required */
150 CF_EMIT = (1<<11),
151 CF_STRM = (1<<12), /* MEM_STREAM* */
152
153 CF_RAT = (1<<13), /* MEM_RAT* */
154
155 CF_LOOP_START = (1<<14)
156 };
157
158 /* ALU instruction info */
159 struct alu_op_info
160 {
161 /* instruction name */
162 const char *name;
163 /* number of source operands */
164 int src_count;
165 /* opcodes, [0] - for r6xx/r7xx, [1] - for evergreen/cayman
166 * (-1) if instruction doesn't exist (more precise info in "slots") */
167 int opcode[2];
168 /* slots for r6xx, r7xx, evergreen, cayman
169 * (0 if instruction doesn't exist for chip class) */
170 int slots[4];
171 /* flags (mostly autogenerated from instruction name) */
172 unsigned int flags;
173 };
174
175 /* FETCH instruction info */
176 struct fetch_op_info
177 {
178 const char * name;
179 /* for every chip class */
180 int opcode[4];
181 int flags;
182 };
183
184 /* CF instruction info */
185 struct cf_op_info
186 {
187 const char * name;
188 /* for every chip class */
189 int opcode[4];
190 int flags;
191 };
192
193
194 #define ALU_OP2_ADD 0
195 #define ALU_OP2_MUL 1
196 #define ALU_OP2_MUL_IEEE 2
197 #define ALU_OP2_MAX 3
198 #define ALU_OP2_MIN 4
199 #define ALU_OP2_MAX_DX10 5
200 #define ALU_OP2_MIN_DX10 6
201 #define ALU_OP2_SETE 7
202 #define ALU_OP2_SETGT 8
203 #define ALU_OP2_SETGE 9
204 #define ALU_OP2_SETNE 10
205 #define ALU_OP2_SETE_DX10 11
206 #define ALU_OP2_SETGT_DX10 12
207 #define ALU_OP2_SETGE_DX10 13
208 #define ALU_OP2_SETNE_DX10 14
209 #define ALU_OP1_FRACT 15
210 #define ALU_OP1_TRUNC 16
211 #define ALU_OP1_CEIL 17
212 #define ALU_OP1_RNDNE 18
213 #define ALU_OP1_FLOOR 19
214 #define ALU_OP2_ASHR_INT 20
215 #define ALU_OP2_LSHR_INT 21
216 #define ALU_OP2_LSHL_INT 22
217 #define ALU_OP1_MOV 23
218 #define ALU_OP0_NOP 24
219 #define ALU_OP2_PRED_SETGT_UINT 25
220 #define ALU_OP2_PRED_SETGE_UINT 26
221 #define ALU_OP2_PRED_SETE 27
222 #define ALU_OP2_PRED_SETGT 28
223 #define ALU_OP2_PRED_SETGE 29
224 #define ALU_OP2_PRED_SETNE 30
225 #define ALU_OP1_PRED_SET_INV 31
226 #define ALU_OP2_PRED_SET_POP 32
227 #define ALU_OP0_PRED_SET_CLR 33
228 #define ALU_OP1_PRED_SET_RESTORE 34
229 #define ALU_OP2_PRED_SETE_PUSH 35
230 #define ALU_OP2_PRED_SETGT_PUSH 36
231 #define ALU_OP2_PRED_SETGE_PUSH 37
232 #define ALU_OP2_PRED_SETNE_PUSH 38
233 #define ALU_OP2_KILLE 39
234 #define ALU_OP2_KILLGT 40
235 #define ALU_OP2_KILLGE 41
236 #define ALU_OP2_KILLNE 42
237 #define ALU_OP2_AND_INT 43
238 #define ALU_OP2_OR_INT 44
239 #define ALU_OP2_XOR_INT 45
240 #define ALU_OP1_NOT_INT 46
241 #define ALU_OP2_ADD_INT 47
242 #define ALU_OP2_SUB_INT 48
243 #define ALU_OP2_MAX_INT 49
244 #define ALU_OP2_MIN_INT 50
245 #define ALU_OP2_MAX_UINT 51
246 #define ALU_OP2_MIN_UINT 52
247 #define ALU_OP2_SETE_INT 53
248 #define ALU_OP2_SETGT_INT 54
249 #define ALU_OP2_SETGE_INT 55
250 #define ALU_OP2_SETNE_INT 56
251 #define ALU_OP2_SETGT_UINT 57
252 #define ALU_OP2_SETGE_UINT 58
253 #define ALU_OP2_KILLGT_UINT 59
254 #define ALU_OP2_KILLGE_UINT 60
255 #define ALU_OP2_PRED_SETE_INT 61
256 #define ALU_OP2_PRED_SETGT_INT 62
257 #define ALU_OP2_PRED_SETGE_INT 63
258 #define ALU_OP2_PRED_SETNE_INT 64
259 #define ALU_OP2_KILLE_INT 65
260 #define ALU_OP2_KILLGT_INT 66
261 #define ALU_OP2_KILLGE_INT 67
262 #define ALU_OP2_KILLNE_INT 68
263 #define ALU_OP2_PRED_SETE_PUSH_INT 69
264 #define ALU_OP2_PRED_SETGT_PUSH_INT 70
265 #define ALU_OP2_PRED_SETGE_PUSH_INT 71
266 #define ALU_OP2_PRED_SETNE_PUSH_INT 72
267 #define ALU_OP2_PRED_SETLT_PUSH_INT 73
268 #define ALU_OP2_PRED_SETLE_PUSH_INT 74
269 #define ALU_OP1_FLT_TO_INT 75
270 #define ALU_OP1_BFREV_INT 76
271 #define ALU_OP2_ADDC_UINT 77
272 #define ALU_OP2_SUBB_UINT 78
273 #define ALU_OP0_GROUP_BARRIER 79
274 #define ALU_OP0_GROUP_SEQ_BEGIN 80
275 #define ALU_OP0_GROUP_SEQ_END 81
276 #define ALU_OP2_SET_MODE 82
277 #define ALU_OP0_SET_CF_IDX0 83
278 #define ALU_OP0_SET_CF_IDX1 84
279 #define ALU_OP2_SET_LDS_SIZE 85
280 #define ALU_OP2_MUL_INT24 86
281 #define ALU_OP2_MULHI_INT24 87
282 #define ALU_OP1_FLT_TO_INT_TRUNC 88
283 #define ALU_OP1_EXP_IEEE 89
284 #define ALU_OP1_LOG_CLAMPED 90
285 #define ALU_OP1_LOG_IEEE 91
286 #define ALU_OP1_RECIP_CLAMPED 92
287 #define ALU_OP1_RECIP_FF 93
288 #define ALU_OP1_RECIP_IEEE 94
289 #define ALU_OP1_RECIPSQRT_CLAMPED 95
290 #define ALU_OP1_RECIPSQRT_FF 96
291 #define ALU_OP1_RECIPSQRT_IEEE 97
292 #define ALU_OP1_SQRT_IEEE 98
293 #define ALU_OP1_SIN 99
294 #define ALU_OP1_COS 100
295 #define ALU_OP2_MULLO_INT 101
296 #define ALU_OP2_MULHI_INT 102
297 #define ALU_OP2_MULLO_UINT 103
298 #define ALU_OP2_MULHI_UINT 104
299 #define ALU_OP1_RECIP_INT 105
300 #define ALU_OP1_RECIP_UINT 106
301 #define ALU_OP2_RECIP_64 107
302 #define ALU_OP2_RECIP_CLAMPED_64 108
303 #define ALU_OP2_RECIPSQRT_64 109
304 #define ALU_OP2_RECIPSQRT_CLAMPED_64 110
305 #define ALU_OP2_SQRT_64 111
306 #define ALU_OP1_FLT_TO_UINT 112
307 #define ALU_OP1_INT_TO_FLT 113
308 #define ALU_OP1_UINT_TO_FLT 114
309 #define ALU_OP2_BFM_INT 115
310 #define ALU_OP1_FLT32_TO_FLT16 116
311 #define ALU_OP1_FLT16_TO_FLT32 117
312 #define ALU_OP1_UBYTE0_FLT 118
313 #define ALU_OP1_UBYTE1_FLT 119
314 #define ALU_OP1_UBYTE2_FLT 120
315 #define ALU_OP1_UBYTE3_FLT 121
316 #define ALU_OP1_BCNT_INT 122
317 #define ALU_OP1_FFBH_UINT 123
318 #define ALU_OP1_FFBL_INT 124
319 #define ALU_OP1_FFBH_INT 125
320 #define ALU_OP1_FLT_TO_UINT4 126
321 #define ALU_OP2_DOT_IEEE 127
322 #define ALU_OP1_FLT_TO_INT_RPI 128
323 #define ALU_OP1_FLT_TO_INT_FLOOR 129
324 #define ALU_OP2_MULHI_UINT24 130
325 #define ALU_OP1_MBCNT_32HI_INT 131
326 #define ALU_OP1_OFFSET_TO_FLT 132
327 #define ALU_OP2_MUL_UINT24 133
328 #define ALU_OP1_BCNT_ACCUM_PREV_INT 134
329 #define ALU_OP1_MBCNT_32LO_ACCUM_PREV_INT 135
330 #define ALU_OP2_SETE_64 136
331 #define ALU_OP2_SETNE_64 137
332 #define ALU_OP2_SETGT_64 138
333 #define ALU_OP2_SETGE_64 139
334 #define ALU_OP2_MIN_64 140
335 #define ALU_OP2_MAX_64 141
336 #define ALU_OP2_DOT4 142
337 #define ALU_OP2_DOT4_IEEE 143
338 #define ALU_OP2_CUBE 144
339 #define ALU_OP1_MAX4 145
340 #define ALU_OP1_FREXP_64 146
341 #define ALU_OP2_LDEXP_64 147
342 #define ALU_OP1_FRACT_64 148
343 #define ALU_OP2_PRED_SETGT_64 149
344 #define ALU_OP2_PRED_SETE_64 150
345 #define ALU_OP2_PRED_SETGE_64 151
346 #define ALU_OP2_MUL_64 152
347 #define ALU_OP2_ADD_64 153
348 #define ALU_OP1_MOVA_INT 154
349 #define ALU_OP1_FLT64_TO_FLT32 155
350 #define ALU_OP1_FLT32_TO_FLT64 156
351 #define ALU_OP2_SAD_ACCUM_PREV_UINT 157
352 #define ALU_OP2_DOT 158
353 #define ALU_OP1_MUL_PREV 159
354 #define ALU_OP1_MUL_IEEE_PREV 160
355 #define ALU_OP1_ADD_PREV 161
356 #define ALU_OP2_MULADD_PREV 162
357 #define ALU_OP2_MULADD_IEEE_PREV 163
358 #define ALU_OP2_INTERP_XY 164
359 #define ALU_OP2_INTERP_ZW 165
360 #define ALU_OP2_INTERP_X 166
361 #define ALU_OP2_INTERP_Z 167
362 #define ALU_OP1_STORE_FLAGS 168
363 #define ALU_OP1_LOAD_STORE_FLAGS 169
364 #define ALU_OP2_LDS_1A 170
365 #define ALU_OP2_LDS_1A1D 171
366 #define ALU_OP2_LDS_2A 172
367 #define ALU_OP1_INTERP_LOAD_P0 173
368 #define ALU_OP1_INTERP_LOAD_P10 174
369 #define ALU_OP1_INTERP_LOAD_P20 175
370 #define ALU_OP3_BFE_UINT 176
371 #define ALU_OP3_BFE_INT 177
372 #define ALU_OP3_BFI_INT 178
373 #define ALU_OP3_FMA 179
374 #define ALU_OP3_MULADD_INT24 180
375 #define ALU_OP3_CNDNE_64 181
376 #define ALU_OP3_FMA_64 182
377 #define ALU_OP3_LERP_UINT 183
378 #define ALU_OP3_BIT_ALIGN_INT 184
379 #define ALU_OP3_BYTE_ALIGN_INT 185
380 #define ALU_OP3_SAD_ACCUM_UINT 186
381 #define ALU_OP3_SAD_ACCUM_HI_UINT 187
382 #define ALU_OP3_MULADD_UINT24 188
383 #define ALU_OP3_LDS_IDX_OP 189
384 #define ALU_OP3_MULADD 190
385 #define ALU_OP3_MULADD_M2 191
386 #define ALU_OP3_MULADD_M4 192
387 #define ALU_OP3_MULADD_D2 193
388 #define ALU_OP3_MULADD_IEEE 194
389 #define ALU_OP3_CNDE 195
390 #define ALU_OP3_CNDGT 196
391 #define ALU_OP3_CNDGE 197
392 #define ALU_OP3_CNDE_INT 198
393 #define ALU_OP3_CNDGT_INT 199
394 #define ALU_OP3_CNDGE_INT 200
395 #define ALU_OP3_MUL_LIT 201
396 #define ALU_OP1_MOVA 202
397 #define ALU_OP1_MOVA_FLOOR 203
398 #define ALU_OP1_MOVA_GPR_INT 204
399 #define ALU_OP3_MULADD_64 205
400 #define ALU_OP3_MULADD_64_M2 206
401 #define ALU_OP3_MULADD_64_M4 207
402 #define ALU_OP3_MULADD_64_D2 208
403 #define ALU_OP3_MUL_LIT_M2 209
404 #define ALU_OP3_MUL_LIT_M4 210
405 #define ALU_OP3_MUL_LIT_D2 211
406 #define ALU_OP3_MULADD_IEEE_M2 212
407 #define ALU_OP3_MULADD_IEEE_M4 213
408 #define ALU_OP3_MULADD_IEEE_D2 214
409
410 #define LDS_OP2_LDS_ADD 215
411 #define LDS_OP2_LDS_SUB 216
412 #define LDS_OP2_LDS_RSUB 217
413 #define LDS_OP2_LDS_INC 218
414 #define LDS_OP2_LDS_DEC 219
415 #define LDS_OP2_LDS_MIN_INT 220
416 #define LDS_OP2_LDS_MAX_INT 221
417 #define LDS_OP2_LDS_MIN_UINT 222
418 #define LDS_OP2_LDS_MAX_UINT 223
419 #define LDS_OP2_LDS_AND 224
420 #define LDS_OP2_LDS_OR 225
421 #define LDS_OP2_LDS_XOR 226
422 #define LDS_OP3_LDS_MSKOR 227
423 #define LDS_OP2_LDS_WRITE 228
424 #define LDS_OP3_LDS_WRITE_REL 229
425 #define LDS_OP3_LDS_WRITE2 230
426 #define LDS_OP3_LDS_CMP_STORE 231
427 #define LDS_OP3_LDS_CMP_STORE_SPF 232
428 #define LDS_OP2_LDS_BYTE_WRITE 233
429 #define LDS_OP2_LDS_SHORT_WRITE 234
430 #define LDS_OP2_LDS_ADD_RET 235
431 #define LDS_OP2_LDS_SUB_RET 236
432 #define LDS_OP2_LDS_RSUB_RET 237
433 #define LDS_OP2_LDS_INC_RET 238
434 #define LDS_OP2_LDS_DEC_RET 239
435 #define LDS_OP2_LDS_MIN_INT_RET 240
436 #define LDS_OP2_LDS_MAX_INT_RET 241
437 #define LDS_OP2_LDS_MIN_UINT_RET 242
438 #define LDS_OP2_LDS_MAX_UINT_RET 243
439 #define LDS_OP2_LDS_AND_RET 244
440 #define LDS_OP2_LDS_OR_RET 245
441 #define LDS_OP2_LDS_XOR_RET 246
442 #define LDS_OP3_LDS_MSKOR_RET 247
443 #define LDS_OP2_LDS_XCHG_RET 248
444 #define LDS_OP3_LDS_XCHG_REL_RET 249
445 #define LDS_OP3_LDS_XCHG2_RET 250
446 #define LDS_OP3_LDS_CMP_XCHG_RET 251
447 #define LDS_OP3_LDS_CMP_XCHG_SPF_RET 252
448 #define LDS_OP1_LDS_READ_RET 253
449 #define LDS_OP1_LDS_READ_REL_RET 254
450 #define LDS_OP2_LDS_READ2_RET 255
451 #define LDS_OP3_LDS_READWRITE_RET 256
452 #define LDS_OP1_LDS_BYTE_READ_RET 257
453 #define LDS_OP1_LDS_UBYTE_READ_RET 258
454 #define LDS_OP1_LDS_SHORT_READ_RET 259
455 #define LDS_OP1_LDS_USHORT_READ_RET 260
456
457 #define FETCH_OP_VFETCH 0
458 #define FETCH_OP_SEMFETCH 1
459 #define FETCH_OP_READ_SCRATCH 2
460 #define FETCH_OP_READ_REDUCT 3
461 #define FETCH_OP_READ_MEM 4
462 #define FETCH_OP_DS_LOCAL_WRITE 5
463 #define FETCH_OP_DS_LOCAL_READ 6
464 #define FETCH_OP_GDS_ADD 7
465 #define FETCH_OP_GDS_SUB 8
466 #define FETCH_OP_GDS_RSUB 9
467 #define FETCH_OP_GDS_INC 10
468 #define FETCH_OP_GDS_DEC 11
469 #define FETCH_OP_GDS_MIN_INT 12
470 #define FETCH_OP_GDS_MAX_INT 13
471 #define FETCH_OP_GDS_MIN_UINT 14
472 #define FETCH_OP_GDS_MAX_UINT 15
473 #define FETCH_OP_GDS_AND 16
474 #define FETCH_OP_GDS_OR 17
475 #define FETCH_OP_GDS_XOR 18
476 #define FETCH_OP_GDS_MSKOR 19
477 #define FETCH_OP_GDS_WRITE 20
478 #define FETCH_OP_GDS_WRITE_REL 21
479 #define FETCH_OP_GDS_WRITE2 22
480 #define FETCH_OP_GDS_CMP_STORE 23
481 #define FETCH_OP_GDS_CMP_STORE_SPF 24
482 #define FETCH_OP_GDS_BYTE_WRITE 25
483 #define FETCH_OP_GDS_SHORT_WRITE 26
484 #define FETCH_OP_GDS_ADD_RET 27
485 #define FETCH_OP_GDS_SUB_RET 28
486 #define FETCH_OP_GDS_RSUB_RET 29
487 #define FETCH_OP_GDS_INC_RET 30
488 #define FETCH_OP_GDS_DEC_RET 31
489 #define FETCH_OP_GDS_MIN_INT_RET 32
490 #define FETCH_OP_GDS_MAX_INT_RET 33
491 #define FETCH_OP_GDS_MIN_UINT_RET 34
492 #define FETCH_OP_GDS_MAX_UINT_RET 35
493 #define FETCH_OP_GDS_AND_RET 36
494 #define FETCH_OP_GDS_OR_RET 37
495 #define FETCH_OP_GDS_XOR_RET 38
496 #define FETCH_OP_GDS_MSKOR_RET 39
497 #define FETCH_OP_GDS_XCHG_RET 40
498 #define FETCH_OP_GDS_XCHG_REL_RET 41
499 #define FETCH_OP_GDS_XCHG2_RET 42
500 #define FETCH_OP_GDS_CMP_XCHG_RET 43
501 #define FETCH_OP_GDS_CMP_XCHG_SPF_RET 44
502 #define FETCH_OP_GDS_READ_RET 45
503 #define FETCH_OP_GDS_READ_REL_RET 46
504 #define FETCH_OP_GDS_READ2_RET 47
505 #define FETCH_OP_GDS_READWRITE_RET 48
506 #define FETCH_OP_GDS_BYTE_READ_RET 49
507 #define FETCH_OP_GDS_UBYTE_READ_RET 50
508 #define FETCH_OP_GDS_SHORT_READ_RET 51
509 #define FETCH_OP_GDS_USHORT_READ_RET 52
510 #define FETCH_OP_GDS_ATOMIC_ORDERED_ALLOC 53
511 #define FETCH_OP_TF_WRITE 54
512 #define FETCH_OP_DS_GLOBAL_WRITE 55
513 #define FETCH_OP_DS_GLOBAL_READ 56
514 #define FETCH_OP_LD 57
515 #define FETCH_OP_LDFPTR 58
516 #define FETCH_OP_GET_TEXTURE_RESINFO 59
517 #define FETCH_OP_GET_NUMBER_OF_SAMPLES 60
518 #define FETCH_OP_GET_LOD 61
519 #define FETCH_OP_GET_GRADIENTS_H 62
520 #define FETCH_OP_GET_GRADIENTS_V 63
521 #define FETCH_OP_GET_GRADIENTS_H_FINE 64
522 #define FETCH_OP_GET_GRADIENTS_V_FINE 65
523 #define FETCH_OP_GET_LERP 66
524 #define FETCH_OP_SET_TEXTURE_OFFSETS 67
525 #define FETCH_OP_KEEP_GRADIENTS 68
526 #define FETCH_OP_SET_GRADIENTS_H 69
527 #define FETCH_OP_SET_GRADIENTS_V 70
528 #define FETCH_OP_SET_GRADIENTS_H_COARSE 71
529 #define FETCH_OP_SET_GRADIENTS_V_COARSE 72
530 #define FETCH_OP_SET_GRADIENTS_H_PACKED_FINE 73
531 #define FETCH_OP_SET_GRADIENTS_V_PACKED_FINE 74
532 #define FETCH_OP_SET_GRADIENTS_H_PACKED_COARSE 75
533 #define FETCH_OP_SET_GRADIENTS_V_PACKED_COARSE 76
534 #define FETCH_OP_PASS 77
535 #define FETCH_OP_PASS1 78
536 #define FETCH_OP_PASS2 79
537 #define FETCH_OP_PASS3 80
538 #define FETCH_OP_SET_CUBEMAP_INDEX 81
539 #define FETCH_OP_GET_BUFFER_RESINFO 82
540 #define FETCH_OP_FETCH4 83
541 #define FETCH_OP_SAMPLE 84
542 #define FETCH_OP_SAMPLE_L 85
543 #define FETCH_OP_SAMPLE_LB 86
544 #define FETCH_OP_SAMPLE_LZ 87
545 #define FETCH_OP_SAMPLE_G 88
546 #define FETCH_OP_SAMPLE_G_L 89
547 #define FETCH_OP_GATHER4 90
548 #define FETCH_OP_SAMPLE_G_LB 91
549 #define FETCH_OP_SAMPLE_G_LZ 92
550 #define FETCH_OP_GATHER4_O 93
551 #define FETCH_OP_SAMPLE_C 94
552 #define FETCH_OP_SAMPLE_C_L 95
553 #define FETCH_OP_SAMPLE_C_LB 96
554 #define FETCH_OP_SAMPLE_C_LZ 97
555 #define FETCH_OP_SAMPLE_C_G 98
556 #define FETCH_OP_SAMPLE_C_G_L 99
557 #define FETCH_OP_GATHER4_C 100
558 #define FETCH_OP_SAMPLE_C_G_LB 101
559 #define FETCH_OP_SAMPLE_C_G_LZ 102
560 #define FETCH_OP_GATHER4_C_O 103
561
562 #define CF_OP_NOP 0
563 #define CF_OP_TEX 1
564 #define CF_OP_VTX 2
565 #define CF_OP_VTX_TC 3
566 #define CF_OP_GDS 4
567 #define CF_OP_LOOP_START 5
568 #define CF_OP_LOOP_END 6
569 #define CF_OP_LOOP_START_DX10 7
570 #define CF_OP_LOOP_START_NO_AL 8
571 #define CF_OP_LOOP_CONTINUE 9
572 #define CF_OP_LOOP_BREAK 10
573 #define CF_OP_JUMP 11
574 #define CF_OP_PUSH 12
575 #define CF_OP_PUSH_ELSE 13
576 #define CF_OP_ELSE 14
577 #define CF_OP_POP 15
578 #define CF_OP_POP_JUMP 16
579 #define CF_OP_POP_PUSH 17
580 #define CF_OP_POP_PUSH_ELSE 18
581 #define CF_OP_CALL 19
582 #define CF_OP_CALL_FS 20
583 #define CF_OP_RET 21
584 #define CF_OP_EMIT_VERTEX 22
585 #define CF_OP_EMIT_CUT_VERTEX 23
586 #define CF_OP_CUT_VERTEX 24
587 #define CF_OP_KILL 25
588 #define CF_OP_END_PROGRAM 26
589 #define CF_OP_WAIT_ACK 27
590 #define CF_OP_TEX_ACK 28
591 #define CF_OP_VTX_ACK 29
592 #define CF_OP_VTX_TC_ACK 30
593 #define CF_OP_JUMPTABLE 31
594 #define CF_OP_WAVE_SYNC 32
595 #define CF_OP_HALT 33
596 #define CF_OP_CF_END 34
597 #define CF_OP_LDS_DEALLOC 35
598 #define CF_OP_PUSH_WQM 36
599 #define CF_OP_POP_WQM 37
600 #define CF_OP_ELSE_WQM 38
601 #define CF_OP_JUMP_ANY 39
602 #define CF_OP_REACTIVATE 40
603 #define CF_OP_REACTIVATE_WQM 41
604 #define CF_OP_INTERRUPT 42
605 #define CF_OP_INTERRUPT_AND_SLEEP 43
606 #define CF_OP_SET_PRIORITY 44
607 #define CF_OP_MEM_STREAM0_BUF0 45
608 #define CF_OP_MEM_STREAM0_BUF1 46
609 #define CF_OP_MEM_STREAM0_BUF2 47
610 #define CF_OP_MEM_STREAM0_BUF3 48
611 #define CF_OP_MEM_STREAM1_BUF0 49
612 #define CF_OP_MEM_STREAM1_BUF1 50
613 #define CF_OP_MEM_STREAM1_BUF2 51
614 #define CF_OP_MEM_STREAM1_BUF3 52
615 #define CF_OP_MEM_STREAM2_BUF0 53
616 #define CF_OP_MEM_STREAM2_BUF1 54
617 #define CF_OP_MEM_STREAM2_BUF2 55
618 #define CF_OP_MEM_STREAM2_BUF3 56
619 #define CF_OP_MEM_STREAM3_BUF0 57
620 #define CF_OP_MEM_STREAM3_BUF1 58
621 #define CF_OP_MEM_STREAM3_BUF2 59
622 #define CF_OP_MEM_STREAM3_BUF3 60
623 #define CF_OP_MEM_STREAM0 61
624 #define CF_OP_MEM_STREAM1 62
625 #define CF_OP_MEM_STREAM2 63
626 #define CF_OP_MEM_STREAM3 64
627 #define CF_OP_MEM_SCRATCH 65
628 #define CF_OP_MEM_REDUCT 66
629 #define CF_OP_MEM_RING 67
630 #define CF_OP_EXPORT 68
631 #define CF_OP_EXPORT_DONE 69
632 #define CF_OP_MEM_EXPORT 70
633 #define CF_OP_MEM_RAT 71
634 #define CF_OP_MEM_RAT_NOCACHE 72
635 #define CF_OP_MEM_RING1 73
636 #define CF_OP_MEM_RING2 74
637 #define CF_OP_MEM_RING3 75
638 #define CF_OP_MEM_MEM_COMBINED 76
639 #define CF_OP_MEM_RAT_COMBINED_NOCACHE 77
640 #define CF_OP_MEM_RAT_COMBINED 78
641 #define CF_OP_EXPORT_DONE_END 79
642 #define CF_OP_ALU 80
643 #define CF_OP_ALU_PUSH_BEFORE 81
644 #define CF_OP_ALU_POP_AFTER 82
645 #define CF_OP_ALU_POP2_AFTER 83
646 #define CF_OP_ALU_EXT 84
647 #define CF_OP_ALU_CONTINUE 85
648 #define CF_OP_ALU_BREAK 86
649 #define CF_OP_ALU_ELSE_AFTER 87
650
651 /* CF_NATIVE means that r600_bytecode_cf contains pre-encoded native data */
652 #define CF_NATIVE 88
653
654 enum r600_chip_class {
655 ISA_CC_R600,
656 ISA_CC_R700,
657 ISA_CC_EVERGREEN,
658 ISA_CC_CAYMAN
659 };
660
661 struct r600_isa {
662 enum r600_chip_class hw_class;
663
664 /* these arrays provide reverse mapping - opcode => table_index,
665 * typically we don't need such lookup, unless we are decoding the native
666 * bytecode (e.g. when reading the bytestream from llvm backend) */
667 unsigned *alu_op2_map;
668 unsigned *alu_op3_map;
669 unsigned *fetch_map;
670 unsigned *cf_map;
671 };
672
673 struct r600_context;
674
675 int r600_isa_init(struct r600_context *ctx, struct r600_isa *isa);
676 int r600_isa_destroy(struct r600_isa *isa);
677
678 extern const struct alu_op_info r600_alu_op_table[];
679
680 unsigned
681 r600_alu_op_table_size(void);
682
683 const struct alu_op_info *
684 r600_isa_alu(unsigned op);
685
686 const struct fetch_op_info *
687 r600_isa_fetch(unsigned op);
688
689 const struct cf_op_info *
690 r600_isa_cf(unsigned op);
691
692 static inline unsigned
r600_isa_alu_opcode(enum r600_chip_class chip_class,unsigned op)693 r600_isa_alu_opcode(enum r600_chip_class chip_class, unsigned op) {
694 int opc = r600_isa_alu(op)->opcode[chip_class >> 1];
695 assert(opc != -1);
696 return opc;
697 }
698
699 static inline unsigned
r600_isa_alu_slots(enum r600_chip_class chip_class,unsigned op)700 r600_isa_alu_slots(enum r600_chip_class chip_class, unsigned op) {
701 unsigned slots = r600_isa_alu(op)->slots[chip_class];
702 assert(slots != 0);
703 return slots;
704 }
705
706 static inline unsigned
r600_isa_fetch_opcode(enum r600_chip_class chip_class,unsigned op)707 r600_isa_fetch_opcode(enum r600_chip_class chip_class, unsigned op) {
708 int opc = r600_isa_fetch(op)->opcode[chip_class];
709 assert(opc != -1);
710 return opc;
711 }
712
713 static inline unsigned
r600_isa_cf_opcode(enum r600_chip_class chip_class,unsigned op)714 r600_isa_cf_opcode(enum r600_chip_class chip_class, unsigned op) {
715 int opc = r600_isa_cf(op)->opcode[chip_class];
716 assert(opc != -1);
717 return opc;
718 }
719
720 static inline unsigned
r600_isa_alu_by_opcode(struct r600_isa * isa,unsigned opcode,unsigned is_op3)721 r600_isa_alu_by_opcode(struct r600_isa* isa, unsigned opcode, unsigned is_op3) {
722 unsigned op;
723 if (is_op3) {
724 assert(isa->alu_op3_map);
725 op = isa->alu_op3_map[opcode];
726 } else {
727 assert(isa->alu_op2_map);
728 op = isa->alu_op2_map[opcode];
729 }
730 assert(op);
731 return op - 1;
732 }
733
734 static inline unsigned
r600_isa_fetch_by_opcode(struct r600_isa * isa,unsigned opcode)735 r600_isa_fetch_by_opcode(struct r600_isa* isa, unsigned opcode) {
736 unsigned op;
737 assert(isa->fetch_map);
738 op = isa->fetch_map[opcode];
739 assert(op);
740 return op - 1;
741 }
742
743 static inline unsigned
r600_isa_cf_by_opcode(struct r600_isa * isa,unsigned opcode,unsigned is_alu)744 r600_isa_cf_by_opcode(struct r600_isa* isa, unsigned opcode, unsigned is_alu) {
745 unsigned op;
746 assert(isa->cf_map);
747 /* using offset for CF_ALU_xxx opcodes because they overlap with other
748 * CF opcodes (they use different encoding in hw) */
749 op = isa->cf_map[is_alu ? opcode + 0x80 : opcode];
750 assert(op);
751 return op - 1;
752 }
753
754 #ifdef __cplusplus
755 } /* extern "C" */
756 #endif
757
758 #endif /* R600_ISA_H_ */
759