| /external/llvm/lib/Target/AVR/ |
| D | AVRInstrInfo.cpp | 178 case AVRCC::COND_NE: in getBrCond()
202 return AVRCC::COND_NE; in getCondFromBranchOpc()
223 return AVRCC::COND_NE; in getOppositeCondition()
224 case AVRCC::COND_NE: in getOppositeCondition()
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| D | AVRInstrInfo.h | 34 COND_NE, //!< Not equal enumerator
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| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| D | MBlazeInstrInfo.h | 84 COND_NE, enumerator
93 case COND_NE: return MBlaze::BNEID; in GetCondBranchFromCond()
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| /external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
| D | MSP430.h | 25 COND_NE = 1, // aka COND_NZ enumerator
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| D | MSP430InstrInfo.cpp | 140 CC = MSP430CC::COND_NE; in ReverseBranchCondition()
142 case MSP430CC::COND_NE: in ReverseBranchCondition()
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| D | MSP430ISelLowering.cpp | 684 TCC = MSP430CC::COND_NE; // aka COND_NZ in EmitCMP()
805 case MSP430CC::COND_NE: in LowerSETCC()
1117 .addImm(MSP430CC::COND_NE); in EmitShiftInstr()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430.h | 25 COND_NE = 1, // aka COND_NZ enumerator
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| D | MSP430InstrInfo.cpp | 138 CC = MSP430CC::COND_NE; in ReverseBranchCondition()
140 case MSP430CC::COND_NE: in ReverseBranchCondition()
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| D | MSP430ISelLowering.cpp | 805 TCC = MSP430CC::COND_NE; // aka COND_NZ in EmitCMP()
926 case MSP430CC::COND_NE: in LowerSETCC()
1263 .addImm(MSP430CC::COND_NE); in EmitShiftInstr()
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| /external/swiftshader/third_party/LLVM/lib/Target/MSP430/InstPrinter/ |
| D | MSP430InstPrinter.cpp | 99 case MSP430CC::COND_NE: in printCCOperand()
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| /external/llvm/lib/Target/MSP430/InstPrinter/ |
| D | MSP430InstPrinter.cpp | 100 case MSP430CC::COND_NE: in printCCOperand()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86InstrInfo.h | 42 COND_NE = 9, enumerator
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| D | X86InstrInfo.cpp | 1842 case X86::JNE_4: return X86::COND_NE; in GetCondFromBranchOpc()
1864 case X86::COND_NE: return X86::JNE_4; in GetCondBranchFromCond()
1887 case X86::COND_E: return X86::COND_NE; in GetOppositeBranchCondition()
1888 case X86::COND_NE: return X86::COND_E; in GetOppositeBranchCondition()
2048 BranchCode == X86::COND_NE) || in AnalyzeBranch()
2049 (OldBranchCode == X86::COND_NE && in AnalyzeBranch()
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| D | X86ISelLowering.cpp | 3002 case ISD::SETNE: return X86::COND_NE; in TranslateX86CC()
3052 case ISD::SETNE: return X86::COND_NE; in TranslateX86CC()
3073 case X86::COND_NE: in hasFPCMov()
7573 SDValue CC = DAG.getConstant(X86::COND_NE, MVT::i8); in LowerShiftParts()
8652 (CondCode == X86::COND_E || CondCode == X86::COND_NE)) { in LowerSELECT()
8721 CC = DAG.getConstant(X86::COND_NE, MVT::i8); in LowerSELECT()
8722 Cond = EmitTest(Cond, X86::COND_NE, DAG); in LowerSELECT()
8913 CC = DAG.getConstant(X86::COND_NE, MVT::i8); in LowerBRCOND()
8914 Cond = EmitTest(Cond, X86::COND_NE, DAG); in LowerBRCOND()
12895 if (CC == X86::COND_E || CC == X86::COND_NE) { in PerformCMOVCombine()
[all …]
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrInfo.h | 43 COND_NE = 9, enumerator
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| D | X86InstrInfo.cpp | 3690 case X86::JNE_1: return X86::COND_NE; in getCondFromBranchOpc()
3721 case X86::SETNEr: case X86::SETNEm: return X86::COND_NE; in getCondFromSETOpc()
3764 return X86::COND_NE; in getCondFromCMovOpc()
3790 case X86::COND_NE: return X86::JNE_1; in GetCondBranchFromCond()
3813 case X86::COND_E: return X86::COND_NE; in GetOppositeBranchCondition()
3814 case X86::COND_NE: return X86::COND_E; in GetOppositeBranchCondition()
3840 case X86::COND_NE: return X86::COND_NE; in getSwappedCondition()
4081 ((OldBranchCode == X86::COND_P && BranchCode == X86::COND_NE) || in AnalyzeBranchImpl()
4082 (OldBranchCode == X86::COND_NE && BranchCode == X86::COND_P))) { in AnalyzeBranchImpl()
4084 } else if ((OldBranchCode == X86::COND_NP && BranchCode == X86::COND_NE) || in AnalyzeBranchImpl()
[all …]
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| D | X86FastISel.cpp | 193 case CmpInst::FCMP_ONE: CC = X86::COND_NE; break; in getX86ConditionCode()
201 case CmpInst::ICMP_NE: CC = X86::COND_NE; break; in getX86ConditionCode()
1948 X86::CondCode CC = X86::COND_NE; in X86FastEmitCMoveSelect()
2174 X86::CondCode CC = X86::COND_NE; in X86FastEmitPseudoSelect()
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| D | X86ISelLowering.cpp | 3943 case X86::COND_NE: in isX86CCUnsigned()
3965 case ISD::SETNE: return X86::COND_NE; in TranslateIntegerX86CC()
4042 case ISD::SETNE: return X86::COND_NE; in TranslateX86CC()
4063 case X86::COND_NE: in hasFPCMov()
13319 SDValue CC = DAG.getConstant(X86::COND_NE, dl, MVT::i8); in LowerShiftParts()
14737 if ((X86CC == X86::COND_E || X86CC == X86::COND_NE) && Op->hasOneUse() && in EmitTest()
14787 if (!NeedTruncation && (X86CC == X86::COND_E || X86CC == X86::COND_NE)) { in EmitTest()
15839 (CondCode == X86::COND_E || CondCode == X86::COND_NE)) { in LowerSELECT()
15847 (isAllOnesConstant(Op1) == (CondCode == X86::COND_NE))) { in LowerSELECT()
15954 CC = DAG.getConstant(X86::COND_NE, DL, MVT::i8); in LowerSELECT()
[all …]
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstructions.td | 330 def S_CMP_LG_I32 : SOPC_CMP_32 <0x00000001, "s_cmp_lg_i32", COND_NE>;
336 def S_CMP_LG_U32 : SOPC_CMP_32 <0x00000007, "s_cmp_lg_u32", COND_NE >;
686 defm V_CMP_NE_I32 : VOPC_I32 <vopc<0x85, 0xc5>, "v_cmp_ne_i32", COND_NE>;
706 defm V_CMP_NE_I64 : VOPC_I64 <vopc<0xa5, 0xe5>, "v_cmp_ne_i64", COND_NE>;
726 defm V_CMP_NE_U32 : VOPC_I32 <vopc<0xc5, 0xcd>, "v_cmp_ne_u32", COND_NE>;
746 defm V_CMP_NE_U64 : VOPC_I64 <vopc<0xe5, 0xed>, "v_cmp_ne_u64", COND_NE>;
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| D | AMDGPUInstructions.td | 154 def COND_NE : PatLeaf <
|