| /external/llvm/lib/Target/Lanai/ |
| D | LanaiInstrInfo.h | 96 int &CmpValue) const override;
102 unsigned SrcReg2, int CmpMask, int CmpValue,
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| D | LanaiInstrInfo.cpp | 181 int &CmpValue) const { in analyzeCompare()
190 CmpValue = MI.getOperand(1).getImm(); in analyzeCompare()
196 CmpValue = 0; in analyzeCompare()
287 int CmpValue, const MachineRegisterInfo *MRI) const { in optimizeCompareInstr() argument
309 else if (MI->getParent() != CmpInstr.getParent() || CmpValue != 0) { in optimizeCompareInstr()
332 if (isRedundantFlagInstr(&CmpInstr, SrcReg, SrcReg2, CmpValue, &*I)) { in optimizeCompareInstr()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | PeepholeOptimizer.cpp | 338 int CmpMask, CmpValue; in OptimizeCmpInstr() local
339 if (!TII->AnalyzeCompare(MI, SrcReg, CmpMask, CmpValue) || in OptimizeCmpInstr()
344 if (TII->OptimizeCompareInstr(MI, SrcReg, CmpMask, CmpValue, MRI)) { in OptimizeCmpInstr()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.h | 167 int &CmpValue) const override;
171 unsigned SrcReg2, int CmpMask, int CmpValue,
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| D | AArch64InstrInfo.cpp | 694 int &CmpValue) const { in analyzeCompare()
714 CmpValue = 0; in analyzeCompare()
724 CmpValue = MI.getOperand(2).getImm() != 0; in analyzeCompare()
738 CmpValue = AArch64_AM::decodeLogicalImmediate( in analyzeCompare()
884 int CmpValue, const MachineRegisterInfo *MRI) const { in optimizeCompareInstr() argument
912 assert((CmpValue == 0 || CmpValue == 1) && "CmpValue must be 0 or 1!"); in optimizeCompareInstr()
913 if (CmpValue != 0 || SrcReg2 != 0) in optimizeCompareInstr()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 191 int &CmpMask, int &CmpValue) const;
196 int CmpMask, int CmpValue,
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| D | ARMBaseInstrInfo.cpp | 1680 int &CmpValue) const { in AnalyzeCompare()
1687 CmpValue = MI->getOperand(1).getImm(); in AnalyzeCompare()
1693 CmpValue = 0; in AnalyzeCompare()
1733 int CmpValue, const MachineRegisterInfo *MRI) const { in OptimizeCompareInstr() argument
1734 if (CmpValue != 0) in OptimizeCompareInstr()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrInfo.h | 505 int &CmpValue) const override;
511 unsigned SrcReg2, int CmpMask, int CmpValue,
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| D | X86InstrInfo.cpp | 4829 int &CmpValue) const { in analyzeCompare()
4842 CmpValue = MI.getOperand(1).getImm(); in analyzeCompare()
4852 CmpValue = 0; in analyzeCompare()
4861 CmpValue = 0; in analyzeCompare()
4873 CmpValue = MI.getOperand(2).getImm(); in analyzeCompare()
4882 CmpValue = 0; in analyzeCompare()
4894 CmpValue = 0; in analyzeCompare()
5046 int CmpValue, in optimizeCompareInstr() argument
5106 bool IsCmpZero = (SrcReg2 == 0 && CmpValue == 0); in optimizeCompareInstr()
5157 isRedundantFlagInstr(CmpInstr, SrcReg, SrcReg2, CmpValue, Instr)) { in optimizeCompareInstr()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 255 int &CmpValue) const override;
262 unsigned SrcReg2, int CmpMask, int CmpValue,
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| D | ARMBaseInstrInfo.cpp | 2289 int &CmpValue) const { in analyzeCompare()
2297 CmpValue = MI.getOperand(1).getImm(); in analyzeCompare()
2304 CmpValue = 0; in analyzeCompare()
2311 CmpValue = 0; in analyzeCompare()
2393 int CmpValue, const MachineRegisterInfo *MRI) const { in optimizeCompareInstr() argument
2433 else if (MI->getParent() != CmpInstr.getParent() || CmpValue != 0) { in optimizeCompareInstr()
2459 if (isRedundantFlagInstr(&CmpInstr, SrcReg, SrcReg2, CmpValue, &*I)) { in optimizeCompareInstr()
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| /external/llvm/lib/CodeGen/ |
| D | PeepholeOptimizer.cpp | 566 int CmpMask, CmpValue; in optimizeCmpInstr() local
567 if (!TII->analyzeCompare(*MI, SrcReg, SrcReg2, CmpMask, CmpValue) || in optimizeCmpInstr()
573 if (TII->optimizeCompareInstr(*MI, SrcReg, SrcReg2, CmpMask, CmpValue, MRI)) { in optimizeCmpInstr()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonHardwareLoops.cpp | 1421 int CmpMask = 0, CmpValue = 0; in loopCountMayWrapOrUnderFlow() local
1423 if (!TII->analyzeCompare(*MI, CmpReg1, CmpReg2, CmpMask, CmpValue)) in loopCountMayWrapOrUnderFlow()
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