Searched refs:CondReg (Results 1 – 7 of 7) sorted by relevance
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyFastISel.cpp | 720 unsigned CondReg = getRegForI1Value(Select->getCondition(), Not); in selectSelect() local
721 if (CondReg == 0) in selectSelect()
765 .addReg(CondReg); in selectSelect()
1096 unsigned CondReg = getRegForI1Value(Br->getCondition(), Not); in selectBr() local
1104 .addReg(CondReg); in selectBr()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMFastISel.cpp | 1230 unsigned CondReg; in SelectCmp() local
1236 CondReg = ARM::FPSCR; in SelectCmp()
1240 CondReg = ARM::FPSCR; in SelectCmp()
1244 CondReg = ARM::CPSR; in SelectCmp()
1280 .addImm(ARMPred).addReg(CondReg); in SelectCmp()
1400 unsigned CondReg = getRegForValue(I->getOperand(0)); in SelectSelect() local
1401 if (CondReg == 0) return false; in SelectSelect()
1409 .addReg(CondReg).addImm(1)); in SelectSelect()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 926 unsigned CondReg = createResultReg(&Mips::GPR32RegClass); in selectBranch() local
927 if (!emitCmp(CondReg, CI)) in selectBranch()
930 .addReg(CondReg) in selectBranch()
996 unsigned CondReg = getRegForValue(Cond); in selectSelect() local
998 if (!Src1Reg || !Src2Reg || !CondReg) in selectSelect()
1005 if (!emitIntExt(MVT::i1, CondReg, MVT::i32, ZExtCondReg, true)) in selectSelect()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64FastISel.cpp | 2381 unsigned CondReg = getRegForValue(BI->getCondition()); in selectBranch() local
2382 if (!CondReg) in selectBranch()
2395 unsigned CondReg = getRegForValue(BI->getCondition()); in selectBranch() local
2396 if (CondReg == 0) in selectBranch()
2409 = constrainOperandRegClass(II, CondReg, II.getNumDefs()); in selectBranch()
2621 unsigned CondReg = getRegForValue(Cond); in selectSelect() local
2622 if (!CondReg) in selectSelect()
2673 unsigned CondReg = getRegForValue(Cond); in selectSelect() local
2674 if (!CondReg) in selectSelect()
2679 CondReg = constrainOperandRegClass(II, CondReg, 1); in selectSelect()
[all …]
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| /external/llvm/lib/Target/ARM/ |
| D | ARMFastISel.cpp | 1618 unsigned CondReg = getRegForValue(I->getOperand(0)); in SelectSelect() local
1619 if (CondReg == 0) return false; in SelectSelect()
1645 CondReg = constrainOperandRegClass(TII.get(TstOpc), CondReg, 0); in SelectSelect()
1648 .addReg(CondReg) in SelectSelect()
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| /external/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 2023 unsigned CondReg = getRegForValue(Cond); in X86FastEmitCMoveSelect() local
2024 if (CondReg == 0) in X86FastEmitCMoveSelect()
2029 .addReg(CondReg, getKillRegState(CondIsKill)).addImm(1); in X86FastEmitCMoveSelect()
2196 unsigned CondReg = getRegForValue(Cond); in X86FastEmitPseudoSelect() local
2197 if (CondReg == 0) in X86FastEmitPseudoSelect()
2201 .addReg(CondReg, getKillRegState(CondIsKill)).addImm(1); in X86FastEmitPseudoSelect()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 783 unsigned CondReg = createResultReg(&PPC::CRRCRegClass); in SelectBranch() local
786 CondReg)) in SelectBranch()
790 .addImm(PPCPred).addReg(CondReg).addMBB(TBB); in SelectBranch()
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