Searched refs:Cpu_mode (Results 1 – 16 of 16) sorted by relevance
13 enum cpu_mode Cpu_mode; variable18 if(Cpu_mode != UNKNOWN) in find_cpu_mode()24 Cpu_mode = SSE2; in find_cpu_mode()26 Cpu_mode = SSE; in find_cpu_mode()28 Cpu_mode = MMX; in find_cpu_mode()30 Cpu_mode = PORT; in find_cpu_mode()32 fprintf(stderr,"SIMD CPU detect: %s\n",Cpu_modes[Cpu_mode]); in find_cpu_mode()
16 enum cpu_mode Cpu_mode; variable20 if(Cpu_mode != UNKNOWN) in find_cpu_mode()31 Cpu_mode = ALTIVEC; in find_cpu_mode()33 Cpu_mode = PORT; in find_cpu_mode()36 Cpu_mode = PORT; in find_cpu_mode()39 fprintf(stderr,"SIMD CPU detect: %s\n",Cpu_modes[Cpu_mode]); in find_cpu_mode()
13 switch(Cpu_mode){ in create_viterbi27()33 switch(Cpu_mode){ in set_viterbi27_polynomial()59 switch(Cpu_mode){ in init_viterbi27()85 switch(Cpu_mode){ in chainback_viterbi27()106 switch(Cpu_mode){ in delete_viterbi27()138 switch(Cpu_mode){ in update_viterbi27_blk()
13 switch(Cpu_mode){ in create_viterbi29()33 switch(Cpu_mode){ in set_viterbi29_polynomial()59 switch(Cpu_mode){ in init_viterbi29()85 switch(Cpu_mode){ in chainback_viterbi29()106 switch(Cpu_mode){ in delete_viterbi29()135 switch(Cpu_mode){ in update_viterbi29_blk()
13 switch(Cpu_mode){ in create_viterbi39()33 switch(Cpu_mode){ in set_viterbi39_polynomial()60 switch(Cpu_mode){ in init_viterbi39()86 switch(Cpu_mode){ in chainback_viterbi39()107 switch(Cpu_mode){ in delete_viterbi39()136 switch(Cpu_mode){ in update_viterbi39_blk()
14 switch(Cpu_mode){ in create_viterbi615()35 switch(Cpu_mode){ in set_viterbi615_polynomial()61 switch(Cpu_mode){ in init_viterbi615()87 switch(Cpu_mode){ in chainback_viterbi615()108 switch(Cpu_mode){ in delete_viterbi615()137 switch(Cpu_mode){ in update_viterbi615_blk()
38 Cpu_mode = ALTIVEC;41 Cpu_mode = PORT;44 Cpu_mode = MMX;47 Cpu_mode = SSE;50 Cpu_mode = SSE2;
46 Cpu_mode = ALTIVEC;49 Cpu_mode = PORT;52 Cpu_mode = MMX;55 Cpu_mode = SSE;58 Cpu_mode = SSE2;
64 Cpu_mode = ALTIVEC;67 Cpu_mode = PORT;70 Cpu_mode = MMX;73 Cpu_mode = SSE;76 Cpu_mode = SSE2;
66 Cpu_mode = ALTIVEC;69 Cpu_mode = PORT;72 Cpu_mode = MMX;75 Cpu_mode = SSE;78 Cpu_mode = SSE2;
32 switch(Cpu_mode){ in initdp()54 switch(Cpu_mode){ in freedp()75 switch(Cpu_mode){ in dotprod()
23 switch(Cpu_mode){ in sumsq()
22 switch(Cpu_mode){ in peakval()
261 extern enum cpu_mode {UNKNOWN=0,PORT,MMX,SSE,SSE2,ALTIVEC} Cpu_mode;