| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 450 DRegisterLane rm);
454 DRegisterLane rm);
515 DRegisterLane rm);
520 DRegisterLane rm);
525 DRegisterLane rm);
546 DRegisterLane rd,
563 DRegisterLane rn);
1426 DRegisterLane /*rm*/) { in Delegate() argument
1436 DRegisterLane /*rm*/) { in Delegate() argument
1579 DRegisterLane /*rm*/) { in Delegate() argument
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| D | disasm-aarch32.h | 1659 void vdup(Condition cond, DataType dt, DRegister rd, DRegisterLane rm);
1661 void vdup(Condition cond, DataType dt, QRegister rd, DRegisterLane rm);
1828 DRegisterLane rm);
1834 DRegisterLane rm);
1849 DRegisterLane rm);
1858 DRegisterLane rm);
1864 DRegisterLane rm);
1879 DRegisterLane rm);
1898 void vmov(Condition cond, DataType dt, DRegisterLane rd, Register rt);
1906 void vmov(Condition cond, DataType dt, Register rt, DRegisterLane rn);
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| D | instructions-aarch32.h | 321 class DRegisterLane : public DRegister {
325 DRegisterLane(DRegister reg, uint32_t lane) in DRegisterLane() function
327 DRegisterLane(uint32_t code, uint32_t lane) : DRegister(code), lane_(lane) {} in DRegisterLane() function
355 inline std::ostream& operator<<(std::ostream& os, const DRegisterLane lane) {
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| D | macro-assembler-aarch32.h | 6836 void Vdup(Condition cond, DataType dt, DRegister rd, DRegisterLane rm) { in Vdup()
6845 void Vdup(DataType dt, DRegister rd, DRegisterLane rm) { in Vdup()
6849 void Vdup(Condition cond, DataType dt, QRegister rd, DRegisterLane rm) { in Vdup()
6858 void Vdup(DataType dt, QRegister rd, DRegisterLane rm) { in Vdup()
7596 DRegisterLane rm) { in Vmla()
7606 void Vmla(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) { in Vmla()
7614 DRegisterLane rm) { in Vmla()
7624 void Vmla(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) { in Vmla()
7677 DRegisterLane rm) { in Vmlal()
7687 void Vmlal(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) { in Vmlal()
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| D | disasm-aarch32.cc | 4755 DRegisterLane rm) { in vdup()
4764 DRegisterLane rm) { in vdup()
5178 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) { in vmla()
5185 Condition cond, DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) { in vmla()
5213 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) { in vmlal()
5227 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) { in vmls()
5234 Condition cond, DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) { in vmls()
5262 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) { in vmlsl()
5321 DRegisterLane rd, in vmov()
5358 DRegisterLane rn) { in vmov()
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| D | macro-assembler-aarch32.cc | 1727 vmov(cond, Untyped32, DRegisterLane(rd, 1), scratch); in Delegate()
1871 DRegisterLane(rd.GetLowDRegister(), 1), in Delegate()
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| D | assembler-aarch32.cc | 555 explicit Dt_U_opc1_opc2_1(DataType dt, const DRegisterLane& lane);
558 Dt_U_opc1_opc2_1::Dt_U_opc1_opc2_1(DataType dt, const DRegisterLane& lane) { in Dt_U_opc1_opc2_1()
603 explicit Dt_opc1_opc2_1(DataType dt, const DRegisterLane& lane);
606 Dt_opc1_opc2_1::Dt_opc1_opc2_1(DataType dt, const DRegisterLane& lane) { in Dt_opc1_opc2_1()
639 explicit Dt_imm4_1(DataType dt, const DRegisterLane& lane);
642 Dt_imm4_1::Dt_imm4_1(DataType dt, const DRegisterLane& lane) { in Dt_imm4_1()
16199 DRegisterLane rm) { in vdup()
16229 DRegisterLane rm) { in vdup()
18986 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) { in vmla()
19022 Condition cond, DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) { in vmla()
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