Searched refs:ExtOpcode (Results 1 – 3 of 3) sorted by relevance
| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 16235 unsigned ExtOpcode = Ld->getExtensionType() == ISD::ZEXTLOAD ? in LowerExtended1BitVectorLoad() local
16251 SDValue ExtVec = DAG.getNode(ExtOpcode, dl, ExtVT, Load); in LowerExtended1BitVectorLoad()
16264 return DAG.getNode(ExtOpcode, dl, Op.getValueType(), Load); in LowerExtended1BitVectorLoad()
16282 return DAG.getNode(ExtOpcode, dl, VT, BitVec); in LowerExtended1BitVectorLoad()
16287 SDValue ExtVec = DAG.getNode(ExtOpcode, dl, ExtVT, BitVec); in LowerExtended1BitVectorLoad()
16313 SDValue Lo = DAG.getNode(ExtOpcode, dl, MVT::v16i8, LoadLo); in LowerExtended1BitVectorLoad()
16314 SDValue Hi = DAG.getNode(ExtOpcode, dl, MVT::v16i8, LoadHi); in LowerExtended1BitVectorLoad()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 2109 unsigned ExtOpcode) { in addRequiredExtensionForVectorMULL() argument
2120 return DAG.getNode(ExtOpcode, SDLoc(N), NewVT, N); in addRequiredExtensionForVectorMULL()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 6530 unsigned ExtOpcode) { in AddRequiredExtensionForVMULL() argument
6541 return DAG.getNode(ExtOpcode, SDLoc(N), NewVT, N); in AddRequiredExtensionForVMULL()
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