| /external/bison/src/ |
| D | uniqstr.h | 83 F16, F17, F18, F19, F20, \ argument
94 F16, F17, F18, F19, F20, ...) \ argument
96 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20
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| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| D | AlphaCallingConv.td | 31 [F16, F17, F18, F19, F20, F21]>>,
33 CCIfType<[f32, f64], CCAssignToRegWithShadow<[F16, F17, F18, F19, F20, F21],
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| D | AlphaRegisterInfo.td | 89 def F17 : FPR<17, "$f17">, DwarfRegNum<[50]>;
127 F10, F11, F12, F13, F14, F15, F16, F17, F18, F19,
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| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsRegisterInfo.td | 159 def F17 : FPR<17, "F17">, DwarfRegNum<[49]>;
185 def D8 : AFPR<16, "F16", [F16, F17]>;
212 def D17_64 : AFPR64<17, "F17", [F17]>;
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| D | MipsCallingConv.td | 51 F16, F17, F18, F19],
95 CCAssignToReg<[F12, F13, F14, F15, F16, F17, F18, F19]>>>,
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| D | MipsRegisterInfo.cpp | 97 case Mips::S1: case Mips::S1_64: case Mips::F17: case Mips::D17_64: in getRegisterNumbering()
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCFrameLowering.h | 148 {PPC::F17, -120}, in getCalleeSavedSpillSlots()
225 {PPC::F17, -120}, in getCalleeSavedSpillSlots()
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| D | PPCRegisterInfo.cpp | 112 PPC::F14, PPC::F15, PPC::F16, PPC::F17, in getCalleeSavedRegs()
138 PPC::F14, PPC::F15, PPC::F16, PPC::F17, in getCalleeSavedRegs()
166 PPC::F14, PPC::F15, PPC::F16, PPC::F17, in getCalleeSavedRegs()
192 PPC::F14, PPC::F15, PPC::F16, PPC::F17, in getCalleeSavedRegs()
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| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| D | SparcRegisterInfo.td | 103 def F17 : Rf<17, "F17">, DwarfRegNum<[49]>;
128 def D8 : Rd<16, "F16", [F16, F17]>, DwarfRegNum<[80]>;
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| D | FPMover.cpp | 68 SP::F17, SP::F19, SP::F21, SP::F23, SP::F25, SP::F27, SP::F29, SP::F31 in getDoubleRegPair()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCCallingConv.td | 224 R29, R30, R31, F14, F15, F16, F17, F18,
233 R29, R30, R31, F14, F15, F16, F17, F18,
242 X29, X30, X31, F14, F15, F16, F17, F18,
251 X29, X30, X31, F14, F15, F16, F17, F18,
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/MCTargetDesc/ |
| D | PPCBaseInfo.h | 48 case R17: case X17: case F17: case V17: case CR4GT: return 17; in getPPCRegisterNumbering()
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| /external/llvm/lib/Target/PowerPC/Disassembler/ |
| D | PPCDisassembler.cpp | 86 PPC::F16, PPC::F17, PPC::F18, PPC::F19,
128 PPC::F16, PPC::F17, PPC::F18, PPC::F19,
148 PPC::F16, PPC::F17, PPC::F18, PPC::F19,
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| /external/swiftshader/third_party/LLVM/lib/Target/Mips/MCTargetDesc/ |
| D | MipsBaseInfo.h | 70 case Mips::S1: case Mips::S1_64: case Mips::F17: case Mips::D17_64: in getMipsRegisterNumbering()
|
| /external/llvm/lib/Target/Sparc/ |
| D | SparcRegisterInfo.td | 179 def F17 : Rf<17, "F17">, DwarfRegNum<[49]>;
204 def D8 : Rd<16, "F16", [F16, F17]>, DwarfRegNum<[80]>;
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| /external/syslinux/gpxe/src/include/gpxe/efi/Protocol/ |
| D | DebugSupport.h | 337 UINT64 F17[2]; member
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsCallingConv.td | 147 F16, F17, F18, F19],
277 F14, F15, F16, F17, F18, F19]>>>,
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| /external/icu/icu4c/source/data/sprep/ |
| D | rfc4505.txt | 271 1F16..1F17; ; UNASSIGNED
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| D | rfc3530cs.txt | 271 1F16..1F17; ; UNASSIGNED
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| D | rfc3530mixp.txt | 272 1F16..1F17; ; UNASSIGNED
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| D | rfc4011.txt | 271 1F16..1F17; ; UNASSIGNED
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| D | rfc3920res.txt | 272 1F16..1F17; ; UNASSIGNED
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| D | rfc4013.txt | 272 1F16..1F17; ; UNASSIGNED
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| /external/icu/icu4c/source/test/testdata/ |
| D | nfs4_mixed_prep_p.txt | 263 1F16..1F17; ; UNASSIGNED
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| D | nfs4_cs_prep_cs.txt | 263 1F16..1F17; ; UNASSIGNED
|