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/external/llvm/test/CodeGen/Mips/
Dfpbr.ll1 …s -march=mipsel -mcpu=mips32 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,FCC,32-FCC
2 …s -march=mipsel -mcpu=mips32r2 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,FCC,32-FCC
4 ; RUN: llc < %s -march=mips64el -mcpu=mips64 | FileCheck %s -check-prefixes=ALL,FCC,64-FCC
5 ; RUN: llc < %s -march=mips64el -mcpu=mips64r2 | FileCheck %s -check-prefixes=ALL,FCC,64-FCC
12 ; 32-FCC: c.eq.s $f12, $f14
13 ; 64-FCC: c.eq.s $f12, $f13
14 ; FCC: bc1f $BB0_2
47 ; 32-FCC: c.olt.s $f12, $f14
48 ; 64-FCC: c.olt.s $f12, $f13
49 ; FCC: bc1f $BB1_2
[all …]
Danalyzebranch.ll1 ; RUN: llc -march=mips -mcpu=mips32 < %s | FileCheck %s -check-prefixes=ALL,FCC
2 ; RUN: llc -march=mips -mcpu=mips32r2 < %s | FileCheck %s -check-prefixes=ALL,FCC
4 ; RUN: llc -march=mips64 -mcpu=mips4 < %s | FileCheck %s -check-prefixes=ALL,FCC
5 ; RUN: llc -march=mips64 -mcpu=mips64 < %s | FileCheck %s -check-prefixes=ALL,FCC
6 ; RUN: llc -march=mips64 -mcpu=mips64r2 < %s | FileCheck %s -check-prefixes=ALL,FCC
13 ; FCC: bc1f $BB
14 ; FCC: nop
46 ; FCC: bc1f $BB
47 ; FCC: nop
/external/clang/test/CXX/concepts-ts/dcl.dcl/dcl.spec/dcl.spec.concept/
Dp2.cpp13 template<typename T> concept constexpr bool FCC() { return true; } // expected-error {{function con… in FCC() function
/external/swiftshader/third_party/subzero/src/
DIceInstMIPS32.h80 using FCC = enum { FCC0 = 0, FCC1, FCC2, FCC3, FCC4, FCC5, FCC6, FCC7 };
81 static OperandMIPS32FCC *create(Cfg *Func, OperandMIPS32FCC::FCC FCC) { in create() argument
82 return new (Func->allocate<OperandMIPS32FCC>()) OperandMIPS32FCC(FCC); in create()
85 OperandMIPS32FCC::FCC getFCC() const { return FpCondCode; } in getFCC()
106 OperandMIPS32FCC(OperandMIPS32FCC::FCC CC) in OperandMIPS32FCC()
109 const OperandMIPS32FCC::FCC FpCondCode;
1151 Variable *Src, Operand *FCC) { in create() argument
1153 InstMIPS32MovConditional(Func, Dest, Src, FCC); in create()
1188 Operand *FCC) in InstMIPS32MovConditional() argument
1191 addSource(FCC); in InstMIPS32MovConditional()
DIceTargetLoweringMIPS32.h414 void _movf(Variable *Dest, Variable *Src0, Operand *FCC) { in _movf() argument
415 Context.insert<InstMIPS32Movf>(Dest, Src0, FCC)->setDestRedefined(); in _movf()
430 void _movt(Variable *Dest, Variable *Src0, Operand *FCC) { in _movt() argument
431 Context.insert<InstMIPS32Movt>(Dest, Src0, FCC)->setDestRedefined(); in _movt()
DIceAssemblerMIPS32.cpp838 OperandMIPS32FCC::FCC Cc = OperandMIPS32FCC::FCC0; in movf()
873 OperandMIPS32FCC::FCC Cc = OperandMIPS32FCC::FCC0; in movt()
/external/swiftshader/third_party/LLVM/lib/Target/Sparc/
DSparcRegisterInfo.td46 def FCC : SparcCtrlReg<"FCC">;
DSparcInstrInfo.td254 // permutations of selection between i32/f32/f64 on ICC and FCC.
275 let usesCustomInserter = 1, Uses = [FCC] in {
536 let Uses = [FCC] in
548 ICC, FCC, Y] in {
684 let Defs = [FCC] in {
716 let Uses = [FCC] in {
742 let Uses = [FCC] in {
/external/llvm/lib/Target/Mips/
DMipsRegisterInfo.td202 def FCC#I : MipsReg<#I, "fcc"#I>;
396 def FCC : RegisterClass<"Mips", [i32], 32, (sequence "FCC%u", 0, 7)>,
621 def FCCRegsOpnd : RegisterOperand<FCC> {
/external/llvm/lib/Target/Sparc/
DSparcRegisterInfo.td61 def FCC#I : SparcCtrlReg<I, "FCC"#I>;
356 def FCCRegs : RegisterClass<"SP", [i1], 1, (sequence "FCC%u", 0, 3)>;
/external/icu/icu4c/source/data/unidata/
DSpecialCasing.txt180 1FC3; 1FC3; 1FCC; 0397 0399; # GREEK SMALL LETTER ETA WITH YPOGEGRAMMENI
181 1FCC; 1FC3; 1FCC; 0397 0399; # GREEK CAPITAL LETTER ETA WITH PROSGEGRAMMENI
DDerivedCoreProperties.txt730 1FC6..1FCC ; Alphabetic
2603 1FC6..1FCC ; Cased
3542 1FC8..1FCC ; Changes_When_Lowercased
4154 1FCC ; Changes_When_Uppercased
5386 1FC7..1FCC ; Changes_When_Casefolded
5647 1FC6..1FCC ; Changes_When_Casemapped
5977 1FC6..1FCC ; ID_Start
6913 1FC6..1FCC ; ID_Continue
7792 1FC6..1FCC ; XID_Start
8728 1FC6..1FCC ; XID_Continue
[all …]
DDerivedNormalizationProps.txt877 1FC6..1FCC ; NFD_QC; N
1303 1FC6..1FCC ; NFKD_QC; N
2273 1FC6..1FCC ; Expands_On_NFD
2563 1FC6..1FCC ; Expands_On_NFKD
3874 1FCC ; NFKC_CF; 03B7 03B9
4543 2FCC ; NFKC_CF; 9EFD
9212 1FC7..1FCC ; Changes_When_NFKC_Casefolded
/external/icu/android_icu4j/src/main/tests/android/icu/dev/data/unicode/
DSpecialCasing.txt180 1FC3; 1FC3; 1FCC; 0397 0399; # GREEK SMALL LETTER ETA WITH YPOGEGRAMMENI
181 1FCC; 1FC3; 1FCC; 0397 0399; # GREEK CAPITAL LETTER ETA WITH PROSGEGRAMMENI
/external/icu/icu4j/main/tests/core/src/com/ibm/icu/dev/data/unicode/
DSpecialCasing.txt180 1FC3; 1FC3; 1FCC; 0397 0399; # GREEK SMALL LETTER ETA WITH YPOGEGRAMMENI
181 1FCC; 1FC3; 1FCC; 0397 0399; # GREEK CAPITAL LETTER ETA WITH PROSGEGRAMMENI
/external/swiftshader/third_party/LLVM/lib/Target/Mips/
DMipsInstrFPU.td264 def FCMP_S32 : FCC<0x10, (outs), (ins FGR32:$fs, FGR32:$ft, condcode:$cc),
268 def FCMP_D32 : FCC<0x11, (outs), (ins AFGR64:$fs, AFGR64:$ft, condcode:$cc),
DMipsInstrFormats.td207 class FCC<bits<5> _fmt, dag outs, dag ins, string asmstr, list<dag> pattern> :
/external/testng/doc/samplereport/css/
Dmaven-classic.css498 background-color: #FCC;
/external/unicode/
DDerivedAge.txt467 0FBE..0FCC ; 3.0 # [15] TIBETAN KU RU KHA..TIBETAN SYMBOL NOR BU BZHI -KHYIL
1228 9FCC ; 6.1 # CJK UNIFIED IDEOGRAPH-9FCC
/external/icu/icu4c/source/data/unidata/norm2/
Dnfc.txt1193 1FCC=0397 0345
Dnfkc_cf.txt1000 1FCC>03B7 03B9
1667 2FCC>9EFD
/external/google-tv-pairing-protocol/cpp/
Dconfigure4090 for ac_prog in g++ c++ gpp aCC CC cxx cc++ cl.exe FCC KCC RCC xlC_r xlC
4134 for ac_prog in g++ c++ gpp aCC CC cxx cc++ cl.exe FCC KCC RCC xlC_r xlC
7788 for ac_prog in g++ c++ gpp aCC CC cxx cc++ cl.exe FCC KCC RCC xlC_r xlC
7832 for ac_prog in g++ c++ gpp aCC CC cxx cc++ cl.exe FCC KCC RCC xlC_r xlC
/external/google-breakpad/
Dconfigure5050 for ac_prog in g++ c++ gpp aCC CC cxx cc++ cl.exe FCC KCC RCC xlC_r xlC
5094 for ac_prog in g++ c++ gpp aCC CC cxx cc++ cl.exe FCC KCC RCC xlC_r xlC
/external/stressapptest/
Dconfigure3002 for ac_prog in g++ c++ gpp aCC CC cxx cc++ cl.exe FCC KCC RCC xlC_r xlC
3046 for ac_prog in g++ c++ gpp aCC CC cxx cc++ cl.exe FCC KCC RCC xlC_r xlC
/external/icu/icu4c/source/data/sprep/
Drfc4518ci.txt1120 1FCC; 03B7 03B9; MAP

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