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Searched refs:FEXP2 (Results 1 – 25 of 29) sorted by relevance

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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DISDOpcodes.h451 FLOG, FLOG2, FLOG10, FEXP, FEXP2, enumerator
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h525 FLOG, FLOG2, FLOG10, FEXP, FEXP2, enumerator
DBasicTTIImpl.h754 ISDs.push_back(ISD::FEXP2); in getIntrinsicInstrCost()
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DLegalizeVectorOps.cpp183 case ISD::FEXP2: in LegalizeOp()
DLegalizeFloatTypes.cpp73 case ISD::FEXP2: R = SoftenFloatRes_FEXP2(N); break; in SoftenFloatResult()
856 case ISD::FEXP2: ExpandFloatRes_FEXP2(N, Lo, Hi); break; in ExpandFloatResult()
DLegalizeVectorTypes.cpp75 case ISD::FEXP2: in ScalarizeVectorResult()
451 case ISD::FEXP2: in SplitVectorResult()
1302 case ISD::FEXP2: in WidenVectorResult()
DTargetLowering.cpp584 setOperationAction(ISD::FEXP2, MVT::f64, Expand); in TargetLowering()
589 setOperationAction(ISD::FEXP2, MVT::f32, Expand); in TargetLowering()
DLegalizeDAG.cpp3355 case ISD::FEXP2: in ExpandNode()
DSelectionDAG.cpp5966 case ISD::FEXP2: return "fexp2"; in getOperationName()
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp169 case ISD::FEXP2: return "fexp2"; in getOperationName()
DLegalizeFloatTypes.cpp85 case ISD::FEXP2: R = SoftenFloatRes_FEXP2(N); break; in SoftenFloatResult()
1025 case ISD::FEXP2: ExpandFloatRes_FEXP2(N, Lo, Hi); break; in ExpandFloatResult()
1873 case ISD::FEXP2: in PromoteFloatResult()
DLegalizeVectorOps.cpp317 case ISD::FEXP2: in LegalizeOp()
DLegalizeVectorTypes.cpp81 case ISD::FEXP2: in ScalarizeVectorResult()
639 case ISD::FEXP2: in SplitVectorResult()
2157 case ISD::FEXP2: in WidenVectorResult()
DLegalizeDAG.cpp3851 case ISD::FEXP2: in ConvertNodeToLibcall()
4236 case ISD::FEXP2: { in PromoteNode()
DSelectionDAGBuilder.cpp4565 return DAG.getNode(ISD::FEXP2, dl, Op.getValueType(), Op); in expandExp2()
6324 if (visitUnaryFloatCall(I, ISD::FEXP2)) in visitCall()
/external/llvm/lib/CodeGen/
DTargetLoweringBase.cpp928 setOperationAction(ISD::FEXP2, VT, Expand); in initActions()
/external/llvm/lib/Target/Mips/
DMipsSEISelLowering.cpp313 setOperationAction(ISD::FEXP2, Ty, Legal); in addMSAFloatType()
1870 DAG.getNode(ISD::FEXP2, SDLoc(Op), ResTy, Op->getOperand(2))); in lowerINTRINSIC_WO_CHAIN()
DMipsMSAInstrInfo.td2032 // 1.0 when we only need to match ISD::FEXP2.
/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp239 setOperationAction(ISD::FEXP2, MVT::f32, Legal); in AMDGPUTargetLowering()
414 setOperationAction(ISD::FEXP2, VT, Expand); in AMDGPUTargetLowering()
/external/swiftshader/third_party/LLVM/include/llvm/Target/
DTargetSelectionDAG.td376 def fexp2 : SDNode<"ISD::FEXP2" , SDTFPUnaryOp>;
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td445 def fexp2 : SDNode<"ISD::FEXP2" , SDTFPUnaryOp>;
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp286 setOperationAction(ISD::FEXP2, MVT::f16, Promote); in AArch64TargetLowering()
337 setOperationAction(ISD::FEXP2, MVT::v4f16, Expand); in AArch64TargetLowering()
371 setOperationAction(ISD::FEXP2, MVT::v8f16, Expand); in AArch64TargetLowering()
659 setOperationAction(ISD::FEXP2, VT, Expand); in addTypeForNEON()
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp508 setOperationAction(ISD::FEXP2, MVT::v2f64, Expand); in ARMTargetLowering()
526 setOperationAction(ISD::FEXP2, MVT::v4f32, Expand); in ARMTargetLowering()
543 setOperationAction(ISD::FEXP2, MVT::v2f32, Expand); in ARMTargetLowering()
672 setOperationAction(ISD::FEXP2, MVT::f64, Expand); in ARMTargetLowering()
/external/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp1947 ISD::FLOG10, ISD::FEXP, ISD::FEXP2, ISD::FCEIL, ISD::FTRUNC, in HexagonTargetLowering()
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp468 setOperationAction(ISD::FEXP2, VT, Expand); in PPCTargetLowering()
718 setOperationAction(ISD::FEXP2 , MVT::v4f64, Expand); in PPCTargetLowering()
764 setOperationAction(ISD::FEXP2 , MVT::v4f32, Expand); in PPCTargetLowering()

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