| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 452 FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR, enumerator
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 526 FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR, enumerator
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| D | BasicTTIImpl.h | 782 ISDs.push_back(ISD::FFLOOR); in getIntrinsicInstrCost()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCCTRLoops.cpp | 302 case Intrinsic::floor: Opcode = ISD::FFLOOR; break; in mightUseCTR()
348 Opcode = ISD::FFLOOR; break; in mightUseCTR()
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| D | PPCISelLowering.cpp | 149 setOperationAction(ISD::FFLOOR, MVT::ppcf128, Expand); in PPCTargetLowering()
208 setOperationAction(ISD::FFLOOR, MVT::f64, Legal); in PPCTargetLowering()
213 setOperationAction(ISD::FFLOOR, MVT::f32, Legal); in PPCTargetLowering()
473 setOperationAction(ISD::FFLOOR, VT, Expand); in PPCTargetLowering()
519 setOperationAction(ISD::FFLOOR, MVT::v4f32, Legal); in PPCTargetLowering()
578 setOperationAction(ISD::FFLOOR, MVT::v2f64, Legal); in PPCTargetLowering()
798 setOperationAction(ISD::FFLOOR, MVT::v4f64, Legal); in PPCTargetLowering()
803 setOperationAction(ISD::FFLOOR, MVT::v4f32, Legal); in PPCTargetLowering()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 188 case ISD::FFLOOR: in LegalizeOp()
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| D | LegalizeFloatTypes.cpp | 74 case ISD::FFLOOR: R = SoftenFloatRes_FFLOOR(N); break; in SoftenFloatResult()
857 case ISD::FFLOOR: ExpandFloatRes_FFLOOR(N, Lo, Hi); break; in ExpandFloatResult()
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| D | LegalizeVectorTypes.cpp | 76 case ISD::FFLOOR: in ScalarizeVectorResult()
452 case ISD::FFLOOR: in SplitVectorResult()
1303 case ISD::FFLOOR: in WidenVectorResult()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 163 case ISD::FFLOOR: return "ffloor"; in getOperationName()
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| D | LegalizeFloatTypes.cpp | 86 case ISD::FFLOOR: R = SoftenFloatRes_FFLOOR(N); break; in SoftenFloatResult()
1026 case ISD::FFLOOR: ExpandFloatRes_FFLOOR(N, Lo, Hi); break; in ExpandFloatResult()
1874 case ISD::FFLOOR: in PromoteFloatResult()
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| D | LegalizeVectorOps.cpp | 323 case ISD::FFLOOR: in LegalizeOp()
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| D | LegalizeVectorTypes.cpp | 82 case ISD::FFLOOR: in ScalarizeVectorResult()
640 case ISD::FFLOOR: in SplitVectorResult()
2158 case ISD::FFLOOR: in WidenVectorResult()
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| D | LegalizeDAG.cpp | 3861 case ISD::FFLOOR: in ConvertNodeToLibcall()
4221 case ISD::FFLOOR: in PromoteNode()
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| D | SelectionDAG.cpp | 2976 case ISD::FFLOOR: { in getNode()
3027 case ISD::FFLOOR: in getNode()
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| D | SelectionDAGBuilder.cpp | 5192 case Intrinsic::floor: Opcode = ISD::FFLOOR; break; in visitIntrinsicCall()
6282 if (visitUnaryFloatCall(I, ISD::FFLOOR)) in visitCall()
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 87 {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT, ISD::FRINT}) in WebAssemblyTargetLowering()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 243 setOperationAction(ISD::FFLOOR, MVT::f32, Legal); in AMDGPUTargetLowering()
280 setOperationAction(ISD::FFLOOR, MVT::f64, Custom); in AMDGPUTargetLowering()
418 setOperationAction(ISD::FFLOOR, VT, Expand); in AMDGPUTargetLowering()
718 case ISD::FFLOOR: return LowerFFLOOR(Op, DAG); in LowerOperation()
2056 SDValue FloorMul = DAG.getNode(ISD::FFLOOR, SL, MVT::f64, Mul); in LowerFP64_TO_INT()
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| D | SIISelLowering.cpp | 214 setOperationAction(ISD::FFLOOR, MVT::f64, Legal); in SITargetLowering()
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 929 setOperationAction(ISD::FFLOOR, VT, Expand); in initActions()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 277 setOperationAction(ISD::FFLOOR, MVT::f16, Promote); in AArch64TargetLowering()
319 setOperationAction(ISD::FFLOOR, MVT::v4f16, Expand); in AArch64TargetLowering()
350 setOperationAction(ISD::FFLOOR, MVT::v8f16, Expand); in AArch64TargetLowering()
378 setOperationAction(ISD::FFLOOR, Ty, Legal); in AArch64TargetLowering()
529 setOperationAction(ISD::FFLOOR, MVT::v1f64, Expand); in AArch64TargetLowering()
622 setOperationAction(ISD::FFLOOR, Ty, Legal); in AArch64TargetLowering()
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| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 381 def ffloor : SDNode<"ISD::FFLOOR" , SDTFPUnaryOp>;
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 451 def ffloor : SDNode<"ISD::FFLOOR" , SDTFPUnaryOp>;
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 514 setOperationAction(ISD::FFLOOR, MVT::v2f64, Expand); in ARMTargetLowering()
531 setOperationAction(ISD::FFLOOR, MVT::v4f32, Expand); in ARMTargetLowering()
548 setOperationAction(ISD::FFLOOR, MVT::v2f32, Expand); in ARMTargetLowering()
677 setOperationAction(ISD::FFLOOR, MVT::f64, Expand); in ARMTargetLowering()
988 setOperationAction(ISD::FFLOOR, MVT::f32, Legal); in ARMTargetLowering()
1002 setOperationAction(ISD::FFLOOR, MVT::f64, Legal); in ARMTargetLowering()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 363 setOperationAction(ISD::FFLOOR, VT, Legal); in SystemZTargetLowering()
402 setOperationAction(ISD::FFLOOR, MVT::v2f64, Legal); in SystemZTargetLowering()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1948 ISD::FRINT, ISD::FNEARBYINT, ISD::FROUND, ISD::FFLOOR, in HexagonTargetLowering()
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