Home
last modified time | relevance | path

Searched refs:FGR32RegClass (Results 1 – 8 of 8) sorted by relevance

/external/llvm/lib/Target/Mips/
DMipsOptionRecord.h48 FGR32RegClass = &(TRI->getRegClass(Mips::FGR32RegClassID)); in MipsRegInfoRecord()
66 const MCRegisterClass *FGR32RegClass; variable
DMipsSEInstrInfo.cpp94 else if (Mips::FGR32RegClass.contains(SrcReg)) in copyPhysReg()
117 else if (Mips::FGR32RegClass.contains(DestReg)) in copyPhysReg()
139 else if (Mips::FGR32RegClass.contains(DestReg, SrcReg)) in copyPhysReg()
204 else if (Mips::FGR32RegClass.hasSubClassEq(RC)) in storeRegToStack()
277 else if (Mips::FGR32RegClass.hasSubClassEq(RC)) in loadRegFromStack()
DMipsFastISel.cpp347 const TargetRegisterClass *RC = &Mips::FGR32RegClass; in materializeFP()
742 ResultReg = createResultReg(&Mips::FGR32RegClass); in emitLoad()
985 RC = &Mips::FGR32RegClass; in selectSelect()
1036 unsigned DestReg = createResultReg(&Mips::FGR32RegClass); in selectFPTrunc()
1075 unsigned TempReg = createResultReg(&Mips::FGR32RegClass); in selectFPToInt()
DMipsAsmPrinter.cpp258 unsigned FGR32RegSize = Mips::FGR32RegClass.getSize(); in printSavedRegsBitmask()
269 if (Mips::FGR32RegClass.contains(Reg)) { in printSavedRegsBitmask()
DMipsSEISelLowering.cpp103 addRegisterClass(MVT::f32, &Mips::FGR32RegClass); in MipsSETargetLowering()
DMipsISelLowering.cpp3535 return std::make_pair(0U, &Mips::FGR32RegClass); in getRegForInlineAsmConstraint()
/external/swiftshader/third_party/LLVM/lib/Target/Mips/
DMipsInstrInfo.cpp113 else if (Mips::FGR32RegClass.contains(SrcReg)) in copyPhysReg()
123 else if (Mips::FGR32RegClass.contains(DestReg)) in copyPhysReg()
130 else if (Mips::FGR32RegClass.contains(DestReg, SrcReg)) in copyPhysReg()
/external/llvm/lib/Target/Mips/MCTargetDesc/
DMipsOptionRecord.cpp85 else if (FGR32RegClass->contains(CurrentSubReg) || in SetPhysRegUsed()