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Searched refs:FMAXNAN (Results 1 – 13 of 13) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h535 FMINNAN, FMAXNAN, enumerator
DBasicTTIImpl.h776 ISDs.push_back(ISD::FMAXNAN); in getIntrinsicInstrCost()
DSelectionDAG.h1189 case ISD::FMAXNAN:
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp156 case ISD::FMAXNAN: return "fmaxnan"; in getOperationName()
DLegalizeVectorOps.cpp306 case ISD::FMAXNAN: in LegalizeOp()
DSelectionDAGBuilder.cpp2801 case SPNB_RETURNS_NAN: Opc = ISD::FMAXNAN; break; in visitSelect()
2807 else if (TLI.isOperationLegalOrCustom(ISD::FMAXNAN, VT)) in visitSelect()
2808 Opc = ISD::FMAXNAN; in visitSelect()
2811 ISD::FMAXNUM : ISD::FMAXNAN; in visitSelect()
5220 I.hasNoNaNs() && TLI.isOperationLegalOrCustom(ISD::FMAXNAN, VT) in visitIntrinsicCall()
5221 ? ISD::FMAXNAN in visitIntrinsicCall()
DLegalizeVectorTypes.cpp113 case ISD::FMAXNAN: in ScalarizeVectorResult()
678 case ISD::FMAXNAN: in SplitVectorResult()
2094 case ISD::FMAXNAN: in WidenVectorResult()
DLegalizeFloatTypes.cpp1889 case ISD::FMAXNAN: in PromoteFloatResult()
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.cpp91 setOperationAction(ISD::FMAXNAN, T, Legal); in WebAssemblyTargetLowering()
/external/llvm/lib/CodeGen/
DTargetLoweringBase.cpp871 setOperationAction(ISD::FMAXNAN, VT, Expand); in initActions()
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td438 def fmaxnan : SDNode<"ISD::FMAXNAN" , SDTFPBinOp>;
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp295 setOperationAction(ISD::FMAXNAN, MVT::f16, Promote); in AArch64TargetLowering()
387 setOperationAction(ISD::FMAXNAN, Ty, Legal); in AArch64TargetLowering()
704 for (unsigned Opcode : {ISD::FMINNAN, ISD::FMAXNAN, in addTypeForNEON()
8555 return DAG.getNode(ISD::FMAXNAN, SDLoc(N), N->getValueType(0), in performIntrinsicCombine()
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp1017 setOperationAction(ISD::FMAXNAN, MVT::f32, Legal); in ARMTargetLowering()
1019 setOperationAction(ISD::FMAXNAN, MVT::v2f32, Legal); in ARMTargetLowering()
1021 setOperationAction(ISD::FMAXNAN, MVT::v4f32, Legal); in ARMTargetLowering()
2992 ? ISD::FMINNAN : ISD::FMAXNAN; in LowerINTRINSIC_WO_CHAIN()