/external/valgrind/none/tests/ppc64/ |
D | round.c | 33 FMSUB, FNMADD, FNMSUB, FSQRT enumerator 988 case FMSUB: in check_double_guarded_arithmetic_op() 1123 case FMSUB: in check_double_guarded_arithmetic_op()
|
/external/valgrind/none/tests/ppc32/ |
D | round.c | 33 FMSUB, FNMADD, FNMSUB, FSQRT enumerator 988 case FMSUB: in check_double_guarded_arithmetic_op() 1123 case FMSUB: in check_double_guarded_arithmetic_op()
|
/external/llvm/lib/Target/X86/ |
D | X86IntrinsicsInfo.h | 1649 X86_INTRINSIC_DATA(avx512_mask3_vfmsub_pd_128, FMA_OP_MASK3, X86ISD::FMSUB, 0), 1650 X86_INTRINSIC_DATA(avx512_mask3_vfmsub_pd_256, FMA_OP_MASK3, X86ISD::FMSUB, 0), 1651 X86_INTRINSIC_DATA(avx512_mask3_vfmsub_pd_512, FMA_OP_MASK3, X86ISD::FMSUB, 1653 X86_INTRINSIC_DATA(avx512_mask3_vfmsub_ps_128, FMA_OP_MASK3, X86ISD::FMSUB, 0), 1654 X86_INTRINSIC_DATA(avx512_mask3_vfmsub_ps_256, FMA_OP_MASK3, X86ISD::FMSUB, 0), 1655 X86_INTRINSIC_DATA(avx512_mask3_vfmsub_ps_512, FMA_OP_MASK3, X86ISD::FMSUB, 1846 X86_INTRINSIC_DATA(fma_vfmsub_pd, INTR_TYPE_3OP, X86ISD::FMSUB, 0), 1847 X86_INTRINSIC_DATA(fma_vfmsub_pd_256, INTR_TYPE_3OP, X86ISD::FMSUB, 0), 1848 X86_INTRINSIC_DATA(fma_vfmsub_ps, INTR_TYPE_3OP, X86ISD::FMSUB, 0), 1849 X86_INTRINSIC_DATA(fma_vfmsub_ps_256, INTR_TYPE_3OP, X86ISD::FMSUB, 0),
|
D | X86ISelLowering.h | 476 FMSUB, enumerator
|
D | X86InstrFragmentsSIMD.td | 471 def X86Fmsub : SDNode<"X86ISD::FMSUB", SDTFma>;
|
D | X86ISelLowering.cpp | 22285 case X86ISD::FMSUB: return "X86ISD::FMSUB"; in getTargetNodeName() 29762 case X86ISD::FMSUB: in combineFneg() 29766 return DAG.getNode(X86ISD::FMSUB, DL, VT, Arg.getOperand(0), in combineFneg() 30229 Opcode = (!NegC) ? X86ISD::FMADD : X86ISD::FMSUB; in combineFMA()
|
/external/valgrind/ |
D | README.aarch64 | 146 FMADD/FMSUB/FNMADD/FNMSUB: generate and use the relevant fused
|
/external/v8/src/ppc/ |
D | disasm-ppc.cc | 957 case FMSUB: { in DecodeExt4()
|
D | constants-ppc.h | 1823 V(fmsub, FMSUB, 0xFC000038) \
|
D | assembler-ppc.cc | 2354 emit(EXT4 | FMSUB | frt.code() * B21 | fra.code() * B16 | frb.code() * B11 | in fmsub()
|
D | simulator-ppc.cc | 2878 case FMSUB: { in ExecuteExt4()
|
/external/v8/src/arm64/ |
D | disasm-arm64.cc | 1051 FORMAT(FMSUB, "fmsub"); in VisitFPDataProcessing3Source()
|
/external/vixl/src/aarch64/ |
D | disasm-aarch64.cc | 1540 FORMAT(FMSUB, "fmsub"); in VisitFPDataProcessing3Source()
|
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
D | PPCInstrInfo.td | 1237 def FMSUB : AForm_1<63, 28,
|
/external/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 2302 ### FMSUB ### subsection
|
/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 2633 defm FMSUB : ThreeOperandFPData<0, 1, "fmsub", 2643 // N.b. FMSUB etc have the accumulator at the *end* of (outs), unlike
|
/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrInfo.td | 2539 defm FMSUB : AForm_1r<63, 28,
|