/external/mesa3d/src/gallium/drivers/swr/rasterizer/jitter/ |
D | blend_jit.cpp | 230 src[swizComp] = FADD(FMUL(src[swizComp], VIMMED1(factor)), VIMMED1(0.5f)); in Quantize() 232 src[swizComp] = FMUL(src[swizComp], VIMMED1(1.0f /factor)); in Quantize() 248 srcBlend[i] = FMUL(src[i], srcFactor[i]); in BlendFunc() 249 dstBlend[i] = FMUL(dst[i], dstFactor[i]); in BlendFunc() 458 Value* pAlphaU8 = FMUL(pAlpha, VIMMED1(256.0f)); in AlphaTest() 590 currentMask = FMUL(pClampedSrc, VBROADCAST(C((float)bits))); in Create() 696 FMUL(src[i], VIMMED1(scale[i])), in Create() 699 FMUL(dst[i], VIMMED1(scale[i])), in Create() 704 FMUL(src[i], VIMMED1(scale[i])), in Create() 707 FMUL(dst[i], VIMMED1(scale[i])), in Create() [all …]
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D | fetch_jit.cpp | 354 …vec = FMUL(vec, ConstantVector::get(std::vector<Constant*>(4, ConstantFP::get(mFP32Ty, 1.0 / 255.0… in JitLoadVertices() 358 …vec = FMUL(vec, ConstantVector::get(std::vector<Constant*>(4, ConstantFP::get(mFP32Ty, 1.0 / 65535… in JitLoadVertices() 370 …vec = FMUL(vec, ConstantVector::get(std::vector<Constant*>(4, ConstantFP::get(mFP32Ty, 1.0 / 128.0… in JitLoadVertices() 374 …vec = FMUL(vec, ConstantVector::get(std::vector<Constant*>(4, ConstantFP::get(mFP32Ty, 1.0 / 32768… in JitLoadVertices() 429 … vec = FMUL(SI_TO_FP(vec, VectorType::get(mFP32Ty, 4)), VBROADCAST(C(1/65536.0f))); in JitLoadVertices() 658 texels[compIndex] = FMUL(texels[compIndex], vScale); in ConvertFormat() 682 texels[compIndex] = FMUL(texels[compIndex], vScale); in ConvertFormat() 1099 … pGather = FMUL(SI_TO_FP(pGather, mSimdFP32Ty), VBROADCAST(C(1/65536.0f))); in JitGatherVertices() 1353 …vVertexElements[currentVertexElement] = FMUL(CAST(fpCast, vVertexElements[currentVertexElement], m… in Shuffle8bpcGatherd() 1442 …vVertexElements[currentVertexElement] = FMUL(CAST(fpCast, vVertexElements[currentVertexElement], m… in Shuffle8bpcGatherd() [all …]
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/external/mesa3d/src/gallium/drivers/swr/ |
D | swr_shader.cpp | 322 Value *dist = FADD(FMUL(unwrap(cx), VBROADCAST(px)), in CompileVS() 323 FADD(FMUL(unwrap(cy), VBROADCAST(py)), in CompileVS() 324 FADD(FMUL(unwrap(cz), VBROADCAST(pz)), in CompileVS() 325 FMUL(unwrap(cw), VBROADCAST(pw))))); in CompileVS() 485 ff = FSUB(FMUL(ff, C(2.0f)), C(1.0f)); in CompileFS() 592 vc = FMUL(vk, vc); in CompileFS() 594 Value *interp = FMUL(va, vi); in CompileFS() 595 Value *interp1 = FMUL(vb, vj); in CompileFS() 600 interp = FMUL(interp, vw); in CompileFS()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGBuilder.cpp | 3627 SDValue t0 = DAG.getNode(ISD::FMUL, dl, MVT::f32, Op, in visitExp() 3647 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X, in visitExp() 3651 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X); in visitExp() 3670 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X, in visitExp() 3674 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X); in visitExp() 3677 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X); in visitExp() 3699 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X, in visitExp() 3703 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X); in visitExp() 3706 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X); in visitExp() 3709 SDValue t8 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t7, X); in visitExp() [all …]
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D | LegalizeVectorOps.cpp | 148 case ISD::FMUL: in LegalizeOp() 331 fHI = DAG.getNode(ISD::FMUL, DL, Op.getValueType(), fHI, TWOHW); in ExpandUINT_TO_FLOAT()
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D | SelectionDAGBuilder.h | 483 void visitFMul(const User &I) { visitBinary(I, ISD::FMUL); } in visitFMul()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGBuilder.cpp | 4181 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X, in getLimitedPrecisionExp2() 4185 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X); in getLimitedPrecisionExp2() 4197 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X, in getLimitedPrecisionExp2() 4201 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X); in getLimitedPrecisionExp2() 4204 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X); in getLimitedPrecisionExp2() 4218 SDValue t2 = DAG.getNode(ISD::FMUL, dl, MVT::f32, X, in getLimitedPrecisionExp2() 4222 SDValue t4 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t3, X); in getLimitedPrecisionExp2() 4225 SDValue t6 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t5, X); in getLimitedPrecisionExp2() 4228 SDValue t8 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t7, X); in getLimitedPrecisionExp2() 4231 SDValue t10 = DAG.getNode(ISD::FMUL, dl, MVT::f32, t9, X); in getLimitedPrecisionExp2() [all …]
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D | DAGCombiner.cpp | 628 case ISD::FMUL: in isNegatibleForFree() 698 case ISD::FMUL: in GetNegatedExpression() 1406 case ISD::FMUL: return visitFMUL(N); in visit() 7795 if (Aggressive && N0.getOpcode() == ISD::FMUL && in visitFADDForFMACombine() 7796 N1.getOpcode() == ISD::FMUL) { in visitFADDForFMACombine() 7802 if (N0.getOpcode() == ISD::FMUL && in visitFADDForFMACombine() 7810 if (N1.getOpcode() == ISD::FMUL && in visitFADDForFMACombine() 7821 if (N00.getOpcode() == ISD::FMUL) in visitFADDForFMACombine() 7833 if (N10.getOpcode() == ISD::FMUL) in visitFADDForFMACombine() 7846 N0.getOperand(2).getOpcode() == ISD::FMUL) { in visitFADDForFMACombine() [all …]
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D | LegalizeVectorOps.cpp | 273 case ISD::FMUL: in LegalizeOp() 1011 fHI = DAG.getNode(ISD::FMUL, DL, Op.getValueType(), fHI, TWOHW); in ExpandUINT_TO_FLOAT()
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/external/javassist/src/main/javassist/bytecode/ |
D | Opcode.java | 101 int FMUL = 106; field
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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 235 FADD, FSUB, FMUL, FMA, FDIV, FREM, enumerator
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/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 241 FADD, FSUB, FMUL, FDIV, FREM, enumerator
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/external/mesa3d/src/gallium/drivers/vc4/ |
D | vc4_qpu.h | 219 M_ALU2(FMUL)
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D | vc4_qpu_emit.c | 274 M(FMUL), in vc4_generate_code_block()
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D | vc4_qir.h | 709 QIR_ALU2(FMUL) in QIR_ALU1()
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/external/valgrind/none/tests/ppc64/ |
D | round.c | 32 FADD, FSUB, FMUL, FDIV, FMADD, enumerator 974 case FMUL: in check_double_guarded_arithmetic_op() 1115 case FMUL: in check_double_guarded_arithmetic_op()
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/external/valgrind/none/tests/ppc32/ |
D | round.c | 32 FADD, FSUB, FMUL, FDIV, FMADD, enumerator 974 case FMUL: in check_double_guarded_arithmetic_op() 1115 case FMUL: in check_double_guarded_arithmetic_op()
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/external/llvm/lib/Target/AMDGPU/ |
D | AMDGPUTargetTransformInfo.cpp | 166 case ISD::FMUL: in getArithmeticInstrCost()
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D | SIISelLowering.cpp | 2151 return DAG.getNode(ISD::FMUL, SL, VT, LHS, Recip, &Flags); in LowerFastFDIV() 2187 r1 = DAG.getNode(ISD::FMUL, SL, MVT::f32, RHS, r3); in LowerFDIV32() 2192 SDValue Mul = DAG.getNode(ISD::FMUL, SL, MVT::f32, LHS, r0); in LowerFDIV32() 2194 return DAG.getNode(ISD::FMUL, SL, MVT::f32, r3, Mul); in LowerFDIV32() 2213 SDValue Mul = DAG.getNode(ISD::FMUL, SL, MVT::f32, NumeratorScaled, Fma1); in LowerFDIV32() 2252 SDValue Mul = DAG.getNode(ISD::FMUL, SL, MVT::f64, DivScale1, Fma3); in LowerFDIV64() 2368 DAG.getNode(ISD::FMUL, DL, VT, Arg, in LowerTrig()
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/external/v8/src/arm64/ |
D | constants-arm64.h | 1102 FMUL = FPDataProcessing2SourceFixed | 0x00000000, enumerator 1103 FMUL_s = FMUL, 1104 FMUL_d = FMUL | FP64,
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/external/llvm/lib/Target/X86/ |
D | X86IntrinsicsInfo.h | 812 X86_INTRINSIC_DATA(avx512_mask_mul_pd_128, INTR_TYPE_2OP_MASK, ISD::FMUL, 0), 813 X86_INTRINSIC_DATA(avx512_mask_mul_pd_256, INTR_TYPE_2OP_MASK, ISD::FMUL, 0), 814 X86_INTRINSIC_DATA(avx512_mask_mul_pd_512, INTR_TYPE_2OP_MASK, ISD::FMUL, 816 X86_INTRINSIC_DATA(avx512_mask_mul_ps_128, INTR_TYPE_2OP_MASK, ISD::FMUL, 0), 817 X86_INTRINSIC_DATA(avx512_mask_mul_ps_256, INTR_TYPE_2OP_MASK, ISD::FMUL, 0), 818 X86_INTRINSIC_DATA(avx512_mask_mul_ps_512, INTR_TYPE_2OP_MASK, ISD::FMUL, 820 X86_INTRINSIC_DATA(avx512_mask_mul_sd_round, INTR_TYPE_SCALAR_MASK_RM, ISD::FMUL, 822 X86_INTRINSIC_DATA(avx512_mask_mul_ss_round, INTR_TYPE_SCALAR_MASK_RM, ISD::FMUL,
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/external/llvm/lib/Target/AVR/ |
D | AVRInstrFormats.td | 274 // Special encoding for the FMUL family of instructions. 278 // ff = 0b01 for FMUL
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/external/jacoco/org.jacoco.core.test/src/org/jacoco/core/internal/flow/ |
D | LabelFlowAnalyzerTest.java | 198 testInsn(FMUL, true); in testInsn()
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/external/vixl/src/aarch64/ |
D | constants-aarch64.h | 1198 FMUL = FPDataProcessing2SourceFixed | 0x00000000, enumerator 1199 FMUL_s = FMUL, 1200 FMUL_d = FMUL | FP64,
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/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
D | MBlazeInstrFPU.td | 95 def FMUL : ArithF<0x16, 0x100, "fmul ", fmul, IIC_FPU>;
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