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Searched refs:FeatureBitset (Results 1 – 19 of 19) sorted by relevance

/external/llvm/include/llvm/MC/
DSubtargetFeature.h35 class FeatureBitset : public std::bitset<MAX_SUBTARGET_FEATURES> {
38 FeatureBitset() : bitset() {} in FeatureBitset() function
40 FeatureBitset(const bitset<MAX_SUBTARGET_FEATURES>& B) : bitset(B) {} in FeatureBitset() function
42 FeatureBitset(std::initializer_list<unsigned> Init) : bitset() { in FeatureBitset() function
56 FeatureBitset Value; // K-V integer value
57 FeatureBitset Implies; // K-V bit mask
108 static void ToggleFeature(FeatureBitset &Bits, StringRef String,
112 static void ApplyFeatureFlag(FeatureBitset &Bits, StringRef Feature,
116 FeatureBitset getFeatureBits(StringRef CPU,
DMCSubtargetInfo.h46 FeatureBitset FeatureBits; // Feature bits for current CPU + FS
72 const FeatureBitset& getFeatureBits() const { in getFeatureBits()
78 void setFeatureBits(const FeatureBitset &FeatureBits_) { in setFeatureBits()
96 FeatureBitset ToggleFeature(uint64_t FB);
100 FeatureBitset ToggleFeature(const FeatureBitset& FB);
104 FeatureBitset ToggleFeature(StringRef FS);
108 FeatureBitset ApplyFeatureFlag(StringRef FS);
DMCInstrDesc.h25 class FeatureBitset; variable
/external/llvm/lib/MC/
DMCSubtargetInfo.cpp20 static FeatureBitset getFeatures(StringRef CPU, StringRef FS, in getFeatures()
53 FeatureBitset MCSubtargetInfo::ToggleFeature(uint64_t FB) { in ToggleFeature()
58 FeatureBitset MCSubtargetInfo::ToggleFeature(const FeatureBitset &FB) { in ToggleFeature()
65 FeatureBitset MCSubtargetInfo::ToggleFeature(StringRef FS) { in ToggleFeature()
70 FeatureBitset MCSubtargetInfo::ApplyFeatureFlag(StringRef FS) { in ApplyFeatureFlag()
DSubtargetFeature.cpp135 void SetImpliedBits(FeatureBitset &Bits, const SubtargetFeatureKV *FeatureEntry, in SetImpliedBits()
151 void ClearImpliedBits(FeatureBitset &Bits, in ClearImpliedBits()
166 SubtargetFeatures::ToggleFeature(FeatureBitset &Bits, StringRef Feature, in ToggleFeature()
191 void SubtargetFeatures::ApplyFeatureFlag(FeatureBitset &Bits, StringRef Feature, in ApplyFeatureFlag()
223 FeatureBitset
229 return FeatureBitset(); in getFeatureBits()
238 FeatureBitset Bits; in getFeatureBits()
/external/llvm/lib/Target/AMDGPU/Utils/
DAMDGPUBaseInfo.h18 class FeatureBitset; variable
33 IsaVersion getIsaVersion(const FeatureBitset &Features);
35 const FeatureBitset &Features);
DAMDGPUBaseInfo.cpp30 IsaVersion getIsaVersion(const FeatureBitset &Features) { in getIsaVersion()
51 const FeatureBitset &Features) { in initDefaultAMDKernelCodeT()
/external/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.h331 FeatureBitset FeaturesRequired;
333 bool haveFeatures(FeatureBitset ActiveFeatures) const { in haveFeatures()
436 FeatureBitset FeaturesRequired;
438 bool haveFeatures(FeatureBitset ActiveFeatures) const { in haveFeatures()
/external/llvm/lib/Target/AVR/MCTargetDesc/
DAVRELFStreamer.cpp10 static unsigned getEFlagsForFeatureSet(const FeatureBitset &Features) { in getEFlagsForFeatureSet()
/external/llvm/lib/Target/ARM/
DARMSubtarget.cpp197 const FeatureBitset &Bits = getFeatureBits(); in initSubtargetFeatures()
/external/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp597 const FeatureBitset &FeatureBits = getSubtargetInfo().getFeatureBits(); in AddThumbPredicate()
980 const FeatureBitset &featureBits = in DecoderGPRRegisterClass()
1024 const FeatureBitset &featureBits = in DecodeDPRRegisterClass()
1372 const FeatureBitset &featureBits = in DecodeCopMemInstruction()
1960 const FeatureBitset &FeatureBits = Dis->getSubtargetInfo().getFeatureBits(); in DecodeHINTInstruction()
2173 const FeatureBitset &FeatureBits = Dis->getSubtargetInfo().getFeatureBits(); in DecodeSETPANInstruction()
3363 const FeatureBitset &featureBits = in DecodeT2LoadShift()
3450 const FeatureBitset &featureBits = in DecodeT2LoadImm8()
3531 const FeatureBitset &featureBits = in DecodeT2LoadImm12()
3649 const FeatureBitset &featureBits = in DecodeT2LoadLabel()
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/external/llvm/lib/Target/Mips/MCTargetDesc/
DMipsTargetStreamer.cpp673 const FeatureBitset &Features = STI.getFeatureBits(); in MipsTargetELFStreamer()
779 const FeatureBitset &Features = STI.getFeatureBits(); in finish()
/external/llvm/lib/Target/Mips/AsmParser/
DMipsAsmParser.cpp48 MipsAssemblerOptions(const FeatureBitset &Features_) : in MipsAssemblerOptions()
75 const FeatureBitset &getFeatures() const { return Features; } in getFeatures()
76 void setFeatures(const FeatureBitset &Features_) { Features = Features_; } in setFeatures()
83 static const FeatureBitset AllArchRelatedMask;
89 FeatureBitset Features;
93 const FeatureBitset MipsAssemblerOptions::AllArchRelatedMask = {
357 FeatureBitset FeatureBits = STI.getFeatureBits(); in selectArch()
/external/llvm/lib/Target/X86/AsmParser/
DX86AsmParser.cpp774 FeatureBitset AllModes({X86::Mode64Bit, X86::Mode32Bit, X86::Mode16Bit}); in SwitchMode()
775 FeatureBitset OldMode = STI.getFeatureBits() & AllModes; in SwitchMode()
780 assert(FeatureBitset({mode}) == (STI.getFeatureBits() & AllModes)); in SwitchMode()
/external/llvm/lib/Target/X86/
DX86TargetTransformInfo.cpp1613 const FeatureBitset &CallerBits = in areInlineCompatible()
1615 const FeatureBitset &CalleeBits = in areInlineCompatible()
/external/llvm/lib/Target/X86/Disassembler/
DX86Disassembler.cpp156 const FeatureBitset &FB = STI.getFeatureBits(); in X86GenericDisassembler()
/external/llvm/lib/Target/AArch64/AsmParser/
DAArch64AsmParser.cpp4190 const FeatureBitset Features;
4252 FeatureBitset Features = STI.getFeatureBits(); in parseDirectiveCPU()
4268 FeatureBitset ToggleFeatures = EnableFeature in parseDirectiveCPU()
/external/llvm/lib/Target/ARM/InstPrinter/
DARMInstPrinter.cpp781 const FeatureBitset &FeatureBits = STI.getFeatureBits(); in printMSRMaskOperand()
/external/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp10190 const FeatureBitset Features;
10251 FeatureBitset ToggleFeatures = EnableFeature in parseDirectiveArchExtension()