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Searched refs:GET_UREG_NR (Results 1 – 4 of 4) sorted by relevance

/external/mesa3d/src/gallium/drivers/i915/
Di915_fpc_emit.c122 dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest)); in i915_emit_arith()
145 first = GET_UREG_NR(s[c[0]]); in i915_emit_arith()
147 if (GET_UREG_NR(s[c[i]]) != first) { in i915_emit_arith()
171 p->register_phases[GET_UREG_NR(dest)] = p->nr_tex_indirect; in i915_emit_arith()
194 const uint k = UREG(GET_UREG_TYPE(coord), GET_UREG_NR(coord)); in i915_emit_texld()
244 assert(dest == UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest))); in i915_emit_texld()
255 p->register_phases[GET_UREG_NR(coord)] == p->nr_tex_indirect) in i915_emit_texld()
270 p->register_phases[GET_UREG_NR(dest)] = p->nr_tex_indirect; in i915_emit_texld()
Di915_fpc.h131 #define GET_UREG_NR(reg) (((reg)>>UREG_NR_SHIFT)&REG_NR_MASK) macro
165 #define T0_SAMPLER( reg ) (GET_UREG_NR(reg)<<T0_SAMPLER_NR_SHIFT)
166 #define T1_ADDRESS_REG( reg ) ((GET_UREG_NR(reg)<<T1_ADDRESS_REG_NR_SHIFT) | \
/external/mesa3d/src/mesa/drivers/dri/i915/
Di915_program.c53 #define T0_SAMPLER( reg ) (GET_UREG_NR(reg)<<T0_SAMPLER_NR_SHIFT)
54 #define T1_ADDRESS_REG( reg ) ((GET_UREG_NR(reg)<<T1_ADDRESS_REG_NR_SHIFT) | \
150 dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest)); in i915_emit_arith()
173 first = GET_UREG_NR(s[c[0]]); in i915_emit_arith()
175 if (GET_UREG_NR(s[c[i]]) != first) { in i915_emit_arith()
200 p->register_phases[GET_UREG_NR(dest)] = p->nr_tex_indirect; in i915_emit_arith()
225 if (coord != UREG(GET_UREG_TYPE(coord), GET_UREG_NR(coord))) { in i915_emit_texld()
248 assert(dest == UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest))); in i915_emit_texld()
276 p->register_phases[GET_UREG_NR(coord)] == p->nr_tex_indirect) in i915_emit_texld()
292 p->register_phases[GET_UREG_NR(dest)] = p->nr_tex_indirect; in i915_emit_texld()
Di915_program.h79 #define GET_UREG_NR(reg) (((reg)>>UREG_NR_SHIFT)&REG_NR_MASK) macro