Searched refs:HiOperand (Results 1 – 4 of 4) sorted by relevance
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonCopyToCombine.cpp | 109 MachineOperand &HiOperand, MachineOperand &LoOperand);
112 MachineOperand &HiOperand, MachineOperand &LoOperand);
115 MachineOperand &HiOperand, MachineOperand &LoOperand);
118 MachineOperand &HiOperand, MachineOperand &LoOperand);
121 MachineOperand &HiOperand, MachineOperand &LoOperand);
577 MachineOperand &HiOperand = IsI1Loreg ? I2.getOperand(1) : I1.getOperand(1); in combine() local
580 bool IsHiReg = HiOperand.isReg(); in combine()
584 bool IsC64 = OptForSize && LoOperand.isImm() && HiOperand.isImm() && in combine()
590 emitCombineRR(InsertPt, DoubleRegDest, HiOperand, LoOperand); in combine()
592 emitCombineRI(InsertPt, DoubleRegDest, HiOperand, LoOperand); in combine()
[all …]
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| /external/llvm/lib/Target/Mips/ |
| D | MipsTargetStreamer.h | 139 unsigned BaseReg, MCOperand &HiOperand,
146 MCOperand &HiOperand, MCOperand &LoOperand,
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsTargetStreamer.cpp | 266 unsigned Opcode, unsigned SrcReg, unsigned BaseReg, MCOperand &HiOperand, in emitStoreWithSymOffset() argument
273 emitRX(Mips::LUi, ATReg, HiOperand, IDLoc, STI); in emitStoreWithSymOffset()
323 MCOperand &HiOperand, in emitLoadWithSymOffset() argument
333 emitRX(Mips::LUi, TmpReg, HiOperand, IDLoc, STI); in emitLoadWithSymOffset()
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| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 2678 MCOperand HiOperand = MCOperand::createExpr( in expandLoadInst() local
2683 TOut.emitLoadWithSymOffset(Inst.getOpcode(), DstReg, BaseReg, HiOperand, in expandLoadInst()
2694 TOut.emitLoadWithSymOffset(Inst.getOpcode(), DstReg, BaseReg, HiOperand, in expandLoadInst()
2720 MCOperand HiOperand = MCOperand::createExpr( in expandStoreInst() local
2722 TOut.emitStoreWithSymOffset(Inst.getOpcode(), SrcReg, BaseReg, HiOperand, in expandStoreInst()
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