/external/vixl/src/aarch32/ |
D | operands-aarch32.cc | 128 if (dt.GetValue() == I16) { in ImmediateVbic() 164 return I16; in DecodeDt() 203 case I16: in ImmediateVmov() 305 return I16; in DecodeDt() 365 case I16: in ImmediateVmvn() 413 return I16; in DecodeDt() 450 if (dt.GetValue() == I16) { in ImmediateVorr() 486 return I16; in DecodeDt()
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D | macro-assembler-aarch32.cc | 1675 case I16: in Delegate() 1736 if ((dt.Is(I16) || dt.Is(I32)) && neon_imm.CanConvert<uint32_t>()) { in Delegate() 1747 case I16: in Delegate() 1821 case I16: in Delegate() 1884 if ((dt.Is(I16) || dt.Is(I32)) && neon_imm.CanConvert<uint32_t>()) { in Delegate() 1895 case I16: in Delegate()
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D | instructions-aarch32.cc | 482 case I16: in GetName()
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D | assembler-aarch32.cc | 233 case I16: in Dt_L_imm6_3() 348 case I16: in Dt_imm6_3() 449 case I16: in Dt_op_size_1() 845 case I16: in Dt_F_size_2() 866 case I16: in Dt_F_size_3() 1013 case I16: in Dt_size_2() 1034 case I16: in Dt_size_3() 1058 case I16: in Dt_size_4() 1170 case I16: in Dt_size_9() 1203 case I16: in Dt_size_10() [all …]
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D | instructions-aarch32.h | 273 I16 = kDataTypeI | 16, enumerator
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D | disasm-aarch32.cc | 141 return I16; in Dt_L_imm6_3_Decode() 202 return I16; in Dt_imm6_3_Decode() 264 return I16; in Dt_op_size_1_Decode() 515 return I16; in Dt_F_size_2_Decode() 527 return I16; in Dt_F_size_3_Decode() 613 return I16; in Dt_size_2_Decode() 625 return I16; in Dt_size_3_Decode() 639 return I16; in Dt_size_4_Decode() 703 return I16; in Dt_size_9_Decode() 723 return I16; in Dt_size_10_Decode() [all …]
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/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
D | SystemZInstrFormats.td | 77 class I16<bits<16> op, Format f, dag outs, dag ins, string asmstr, 94 : I16<op, RREForm, outs, ins, asmstr, pattern>; 102 : I16<op, RXYForm, outs, ins, asmstr, pattern>; 110 : I16<op, RSYForm, outs, ins, asmstr, pattern>; 118 : I16<op, SIYForm, outs, ins, asmstr, pattern>; 121 : I16<op, SILForm, outs, ins, asmstr, pattern>;
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/external/libhevc/common/arm/ |
D | ihevc_sao_edge_offset_class1.s | 116 VMOV.I16 Q1,#0 @const_min_clip = vdupq_n_s16(0) 117 VMOV.I16 Q2,#255 @const_max_clip = vdupq_n_u16((1 << bit_depth) - 1) 208 VMOVN.I16 D20,Q10 @vmovn_s16(pi2_tmp_cur_row.val[0]) 211 VMOVN.I16 D21,Q4 @vmovn_s16(pi2_tmp_cur_row.val[1]) 222 VMOVN.I16 D30,Q13 @II vmovn_s16(pi2_tmp_cur_row.val[0]) 224 VMOVN.I16 D31,Q14 @II vmovn_s16(pi2_tmp_cur_row.val[1]) 258 VMOVN.I16 D30,Q13 @vmovn_s16(pi2_tmp_cur_row.val[0]) 259 VMOVN.I16 D31,Q14 @vmovn_s16(pi2_tmp_cur_row.val[1]) 333 VMOVN.I16 D20,Q10 @vmovn_s16(pi2_tmp_cur_row.val[0]) 341 VMOVN.I16 D30,Q13 @II vmovn_s16(pi2_tmp_cur_row.val[0]) [all …]
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D | ihevc_sao_edge_offset_class1_chroma.s | 119 VMOV.I16 Q1,#0 @const_min_clip = vdupq_n_s16(0) 120 VMOV.I16 Q2,#255 @const_max_clip = vdupq_n_u16((1 << bit_depth) - 1) 218 VMOVN.I16 D20,Q10 @vmovn_s16(pi2_tmp_cur_row.val[0]) 221 VMOVN.I16 D21,Q14 @vmovn_s16(pi2_tmp_cur_row.val[1]) 234 VMOVN.I16 D30,Q13 @II vmovn_s16(pi2_tmp_cur_row.val[0]) 236 VMOVN.I16 D31,Q14 @II vmovn_s16(pi2_tmp_cur_row.val[1]) 275 VMOVN.I16 D30,Q13 @vmovn_s16(pi2_tmp_cur_row.val[0]) 276 VMOVN.I16 D31,Q14 @vmovn_s16(pi2_tmp_cur_row.val[1]) 359 VMOVN.I16 D20,Q10 @vmovn_s16(pi2_tmp_cur_row.val[0]) 371 VMOVN.I16 D30,Q13 @II vmovn_s16(pi2_tmp_cur_row.val[0]) [all …]
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D | ihevc_sao_edge_offset_class0.s | 92 VMOV.I16 Q2,#0 @const_min_clip = vdupq_n_s16(0) 96 VMOV.I16 Q3,#255 @const_max_clip = vdupq_n_u16((1 << bit_depth) - 1) 244 VMOVN.I16 D18,Q9 @vmovn_s16(pi2_tmp_cur_row.val[0]) 247 VMOVN.I16 D19,Q7 @vmovn_s16(pi2_tmp_cur_row.val[1]) 253 VMOVN.I16 D0,Q0 @II vmovn_s16(pi2_tmp_cur_row.val[0]) 260 VMOVN.I16 D1,Q14 @II vmovn_s16(pi2_tmp_cur_row.val[1]) 336 VMOVN.I16 D28,Q14 @vmovn_s16(pi2_tmp_cur_row.val[0])
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D | ihevc_sao_edge_offset_class0_chroma.s | 97 VMOV.I16 Q2,#0 @const_min_clip = vdupq_n_s16(0) 101 VMOV.I16 Q3,#255 @const_max_clip = vdupq_n_u16((1 << bit_depth) - 1) 250 VMOVN.I16 D14,Q9 @vmovn_s16(pi2_tmp_cur_row.val[0]) 252 VMOVN.I16 D15,Q6 @vmovn_s16(pi2_tmp_cur_row.val[1]) 278 VMOVN.I16 D28,Q14 @II vmovn_s16(pi2_tmp_cur_row.val[0]) 279 VMOVN.I16 D29,Q15 @II vmovn_s16(pi2_tmp_cur_row.val[1]) 405 VMOVN.I16 D18,Q9 @vmovn_s16(pi2_tmp_cur_row.val[0]) 430 VMOVN.I16 D28,Q12 @II vmovn_s16(pi2_tmp_cur_row.val[0])
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D | ihevc_sao_edge_offset_class2.s | 194 VMOV.I16 Q1,#0 @const_min_clip = vdupq_n_s16(0) 198 VMOV.I16 Q2,#255 @const_max_clip = vdupq_n_u16((1 << bit_depth) - 1) 329 VMOVN.I16 D20,Q10 @I vmovn_s16(pi2_tmp_cur_row.val[0]) 336 VMOVN.I16 D21,Q11 @I vmovn_s16(pi2_tmp_cur_row.val[1]) 435 VMOVN.I16 D26,Q13 @II vmovn_s16(pi2_tmp_cur_row.val[0]) 437 VMOVN.I16 D27,Q14 @II vmovn_s16(pi2_tmp_cur_row.val[1]) 441 VMOVN.I16 D20,Q10 @III vmovn_s16(pi2_tmp_cur_row.val[0]) 448 VMOVN.I16 D21,Q9 @III vmovn_s16(pi2_tmp_cur_row.val[1]) 503 VMOVN.I16 D20,Q10 @vmovn_s16(pi2_tmp_cur_row.val[0]) 506 VMOVN.I16 D21,Q6 @vmovn_s16(pi2_tmp_cur_row.val[1]) [all …]
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D | ihevc_sao_edge_offset_class3.s | 206 VMOV.I16 Q1,#0 @const_min_clip = vdupq_n_s16(0) 210 VMOV.I16 Q2,#255 @const_max_clip = vdupq_n_u16((1 << bit_depth) - 1) 351 VMOVN.I16 D20,Q10 @I vmovn_s16(pi2_tmp_cur_row.val[0]) 355 VMOVN.I16 D21,Q11 @I vmovn_s16(pi2_tmp_cur_row.val[1]) 461 VMOVN.I16 D28,Q14 @II vmovn_s16(pi2_tmp_cur_row.val[0]) 464 VMOVN.I16 D29,Q13 @II vmovn_s16(pi2_tmp_cur_row.val[1]) 476 VMOVN.I16 D20,Q10 @III vmovn_s16(pi2_tmp_cur_row.val[0]) 480 VMOVN.I16 D21,Q11 @III vmovn_s16(pi2_tmp_cur_row.val[1]) 540 VMOVN.I16 D20,Q10 @vmovn_s16(pi2_tmp_cur_row.val[0]) 543 VMOVN.I16 D21,Q11 @vmovn_s16(pi2_tmp_cur_row.val[1]) [all …]
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D | ihevc_sao_edge_offset_class3_chroma.s | 286 VMOV.I16 Q1,#0 @const_min_clip = vdupq_n_s16(0) 287 VMOV.I16 Q2,#255 @const_max_clip = vdupq_n_u16((1 << bit_depth) - 1) 442 VMOVN.I16 D20,Q10 @I vmovn_s16(pi2_tmp_cur_row.val[0]) 446 VMOVN.I16 D21,Q9 @I vmovn_s16(pi2_tmp_cur_row.val[1]) 571 VMOVN.I16 D28,Q14 @II vmovn_s16(pi2_tmp_cur_row.val[0]) 581 VMOVN.I16 D29,Q13 @II vmovn_s16(pi2_tmp_cur_row.val[1]) 596 VMOVN.I16 D20,Q10 @III vmovn_s16(pi2_tmp_cur_row.val[0]) 600 VMOVN.I16 D21,Q9 @III vmovn_s16(pi2_tmp_cur_row.val[1]) 671 VMOVN.I16 D20,Q10 @III vmovn_s16(pi2_tmp_cur_row.val[0]) 675 VMOVN.I16 D21,Q9 @III vmovn_s16(pi2_tmp_cur_row.val[1]) [all …]
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D | ihevc_sao_edge_offset_class2_chroma.s | 277 VMOV.I16 Q1,#0 @const_min_clip = vdupq_n_s16(0) 281 VMOV.I16 Q2,#255 @const_max_clip = vdupq_n_u16((1 << bit_depth) - 1) 451 VMOVN.I16 D20,Q10 @I vmovn_s16(pi2_tmp_cur_row.val[0]) 462 VMOVN.I16 D21,Q9 @I vmovn_s16(pi2_tmp_cur_row.val[1]) 577 VMOVN.I16 D28,Q14 @II vmovn_s16(pi2_tmp_cur_row.val[0]) 579 VMOVN.I16 D29,Q13 @II vmovn_s16(pi2_tmp_cur_row.val[1]) 599 VMOVN.I16 D20,Q10 @III vmovn_s16(pi2_tmp_cur_row.val[0]) 608 VMOVN.I16 D21,Q9 @III vmovn_s16(pi2_tmp_cur_row.val[1]) 668 VMOVN.I16 D20,Q10 @vmovn_s16(pi2_tmp_cur_row.val[0]) 672 VMOVN.I16 D21,Q9 @vmovn_s16(pi2_tmp_cur_row.val[1]) [all …]
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/external/llvm/test/CodeGen/AArch64/ |
D | fp16-v8-instructions.ll | 375 ; CHECK-DAG: xtn [[I16:v[0-9]+]].4h, [[LOF32]] 377 ; CHECK-DAG: xtn2 [[I16]].8h, [[HIF32]] 378 ; CHECK-NEXT: xtn v0.8b, [[I16]].8h 389 ; CHECK-DAG: xtn [[I16:v[0-9]+]].4h, [[LOF32]] 391 ; CHECK-NEXT: xtn2 [[I16]].8h, [[HIF32]] 402 ; CHECK-DAG: xtn [[I16:v[0-9]+]].4h, [[LOF32]] 404 ; CHECK-DAG: xtn2 [[I16]].8h, [[HIF32]] 405 ; CHECK-NEXT: xtn v0.8b, [[I16]].8h 416 ; CHECK-DAG: xtn [[I16:v[0-9]+]].4h, [[LOF32]] 418 ; CHECK-NEXT: xtn2 [[I16]].8h, [[HIF32]]
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/external/valgrind/none/tests/amd64/ |
D | rcl-amd64.c | 6 #define I16(C) "rcrw %%bx\n" "rclw $" #C ",%%ax\n" "rclw %%bx\n" macro 22 asm(I16(C) : "+a"(a), "+b"(b) : /* */); \
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/external/llvm/test/CodeGen/Mips/msa/ |
D | llvm-stress-s2704903805.ll | 44 %I16 = insertelement <4 x i64> <i64 -1, i64 -1, i64 -1, i64 -1>, i64 81222, i32 1 62 %Cmp26 = icmp ult <4 x i64> %I16, %Shuff15
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/external/mesa3d/src/mesa/drivers/dri/nouveau/ |
D | nouveau_render_t.c | 128 EMIT_VBO(I16, ctx, start, delta, n & ~1); in dispatch_i16()
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/external/vixl/test/aarch32/ |
D | test-disasm-a32.cc | 2642 COMPARE_BOTH(Vmov(I16, d0, 0xa4), "vmov.i16 d0, #164\n"); in TEST() 2643 COMPARE_BOTH(Vmov(I16, d0, 0x9797), "vmov.i8 d0, #151\n"); in TEST() 2644 COMPARE_BOTH(Vmov(I16, d0, 0x9ef6), in TEST() 2719 COMPARE_BOTH(Vmov(I16, q0, 0xa4), "vmov.i16 q0, #164\n"); in TEST() 2720 COMPARE_BOTH(Vmov(I16, q0, 0x9797), "vmov.i8 q0, #151\n"); in TEST() 2721 COMPARE_BOTH(Vmov(I16, q0, 0x9ef6), in TEST()
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/external/swiftshader/third_party/subzero/unittest/AssemblerX8632/ |
D | TestUtil.h | 277 int16_t I16[8]; member
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86ISelDAGToDAG.cpp | 1508 I16, enumerator 1614 Opc = AtomicOpcTbl[Op][I16]; in SelectAtomicLoadArith()
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D | X86InstrArithmetic.td | 169 def IMUL16rri : Ii16<0x69, MRMSrcReg, // GR16 = GR16*I16 203 def IMUL16rmi : Ii16<0x69, MRMSrcMem, // GR16 = [mem16]*I16
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/external/swiftshader/third_party/subzero/unittest/AssemblerX8664/ |
D | TestUtil.h | 389 int16_t I16[8]; member
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/external/llvm/lib/Target/X86/ |
D | X86InstrArithmetic.td | 207 def IMUL16rri : Ii16<0x69, MRMSrcReg, // GR16 = GR16*I16 247 def IMUL16rmi : Ii16<0x69, MRMSrcMem, // GR16 = [mem16]*I16
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