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Searched refs:I915_TILING_NONE (Results 1 – 20 of 20) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i965/
Dintel_blit.c465 if (tiling != I915_TILING_NONE) in alignment_valid()
488 const bool dst_tiling_none = dst_tiling == I915_TILING_NONE; in can_fast_copy_blit()
489 const bool src_tiling_none = src_tiling == I915_TILING_NONE; in can_fast_copy_blit()
541 if (dst_tiling != I915_TILING_NONE) in xy_blit_cmd()
544 if (src_tiling != I915_TILING_NONE) in xy_blit_cmd()
560 if (dst_tiling != I915_TILING_NONE) in xy_blit_cmd()
563 if (src_tiling != I915_TILING_NONE) in xy_blit_cmd()
633 assert(src_tiling == I915_TILING_NONE || (src_pitch % src_tile_w) == 0); in intelEmitCopyBlit()
634 assert(dst_tiling == I915_TILING_NONE || (dst_pitch % dst_tile_w) == 0); in intelEmitCopyBlit()
718 if (dst_tiling != I915_TILING_NONE) in intelEmitCopyBlit()
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Dbrw_tex_layout.c561 return I915_TILING_NONE; in brw_miptree_choose_tiling()
576 return I915_TILING_NONE; in brw_miptree_choose_tiling()
605 return I915_TILING_NONE; in brw_miptree_choose_tiling()
611 return I915_TILING_NONE; in brw_miptree_choose_tiling()
616 return I915_TILING_NONE; in brw_miptree_choose_tiling()
Dgen6_depth_state.c120 ((depth_mt ? depth_mt->tiling != I915_TILING_NONE : 1) in gen6_emit_depth_stencil_hiz()
Dintel_mipmap_tree.c118 return tiling != I915_TILING_NONE; in intel_tiling_supports_non_msrt_mcs()
780 if (tiling != I915_TILING_NONE) in intel_miptree_create_for_bo()
1167 case I915_TILING_NONE: in intel_get_tile_dims()
1238 case I915_TILING_NONE: in intel_miptree_get_aligned_offset()
2510 if (mt->tiling != I915_TILING_NONE) in intel_miptree_map_raw()
3070 if (mt->tiling != I915_TILING_NONE && in use_intel_mipree_map_blit()
3215 return (devinfo->gen >= 9 && tiling == I915_TILING_NONE ? in get_isl_dim_layout()
3246 case I915_TILING_NONE: in intel_miptree_get_isl_tiling()
Dintel_screen.c323 if (tiling != I915_TILING_NONE && (image->offset & 0xfff)) { in intel_image_warn_if_unaligned()
558 tiling = I915_TILING_NONE; in intel_create_image()
562 tiling = I915_TILING_NONE; in intel_create_image()
Dbrw_misc_state.c610 ((depth_mt ? depth_mt->tiling != I915_TILING_NONE : 1) in brw_emit_depth_stencil_hiz()
/external/mesa3d/src/mesa/drivers/dri/i915/
Dintel_blit.c240 if (dst_tiling != I915_TILING_NONE) { in intelEmitCopyBlit()
244 if (src_tiling != I915_TILING_NONE) { in intelEmitCopyBlit()
531 if (dst_tiling != I915_TILING_NONE) { in intelEmitImmediateColorExpandBlit()
561 if (dst_tiling != I915_TILING_NONE) in intelEmitImmediateColorExpandBlit()
611 pitch, src_bo, src_offset, I915_TILING_NONE, in intel_emit_linear_blit()
612 pitch, dst_bo, dst_offset, I915_TILING_NONE, in intel_emit_linear_blit()
627 pitch, src_bo, src_offset, I915_TILING_NONE, in intel_emit_linear_blit()
628 pitch, dst_bo, dst_offset, I915_TILING_NONE, in intel_emit_linear_blit()
Dintel_mipmap_tree.c141 return I915_TILING_NONE; in intel_miptree_choose_tiling()
148 return I915_TILING_NONE; in intel_miptree_choose_tiling()
153 return I915_TILING_NONE; in intel_miptree_choose_tiling()
248 if (tiling != I915_TILING_NONE) in intel_miptree_create_for_bo()
709 if (mt->region->tiling != I915_TILING_NONE) in intel_miptree_map_raw()
907 if (mt->region->tiling != I915_TILING_NONE && in intel_miptree_map()
Dintel_regions.c299 case I915_TILING_NONE: in intel_region_get_tile_masks()
342 case I915_TILING_NONE: in intel_region_get_aligned_offset()
Dintel_pixel_read.c137 dst_stride, I915_TILING_NONE); in do_blit_readpixels()
Di830_texstate.c167 if (intelObj->mt->region->tiling != I915_TILING_NONE) { in i830_update_tex_unit()
Di915_vtbl.c535 if (region->tiling != I915_TILING_NONE) { in i915_set_buf_info_for_region()
622 depth_region->tiling != I915_TILING_NONE) in i915_set_draw_region()
Dintel_tex_image.c163 src_stride, I915_TILING_NONE); in try_pbo_upload()
Di915_texstate.c182 if (intelObj->mt->region->tiling != I915_TILING_NONE) { in i915_update_tex_unit()
Dintel_screen.c442 tiling = I915_TILING_NONE; in intel_create_image()
446 tiling = I915_TILING_NONE; in intel_create_image()
/external/libdrm/intel/
Dintel_bufmgr.c249 *tiling_mode = I915_TILING_NONE; in drm_intel_bo_set_tiling()
260 *tiling_mode = I915_TILING_NONE; in drm_intel_bo_get_tiling()
Dintel_bufmgr_gem.c338 if (*tiling_mode == I915_TILING_NONE) in drm_intel_gem_bo_tile_size()
355 *tiling_mode = I915_TILING_NONE; in drm_intel_gem_bo_tile_size()
384 if (*tiling_mode == I915_TILING_NONE) in drm_intel_gem_bo_tile_pitch()
402 *tiling_mode = I915_TILING_NONE; in drm_intel_gem_bo_tile_pitch()
608 if (bufmgr_gem->gen < 4 && bo_gem->tiling_mode != I915_TILING_NONE) { in drm_intel_bo_gem_set_in_aperture_size()
839 bo_gem->tiling_mode = I915_TILING_NONE; in drm_intel_gem_bo_alloc_internal()
885 I915_TILING_NONE, 0, in drm_intel_gem_bo_alloc_for_render()
896 I915_TILING_NONE, 0, 0); in drm_intel_gem_bo_alloc()
927 if ((bufmgr_gem->gen == 2) && tiling != I915_TILING_NONE) in drm_intel_gem_bo_alloc_tiled()
944 if (tiling == I915_TILING_NONE) in drm_intel_gem_bo_alloc_tiled()
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Dintel_bufmgr_fake.c852 *tiling_mode = I915_TILING_NONE; in drm_intel_fake_bo_alloc_tiled()
/external/kernel-headers/original/uapi/drm/
Di915_drm.h946 #define I915_TILING_NONE 0 macro
/external/libdrm/include/drm/
Di915_drm.h1010 #define I915_TILING_NONE 0 macro