Searched refs:InITBlock (Results 1 – 7 of 7) sorted by relevance
| /external/vixl/src/aarch32/ |
| D | disasm-aarch32.h | 52 bool InITBlock() const { return it_mask_ != 0; } in InITBlock() function
53 bool OutsideITBlock() const { return !InITBlock(); } in OutsideITBlock()
105 if (cond.it_block_.InITBlock() && cond.cond_.Is(al) &&
404 : it_block_(it_block), inside_(it_block->InITBlock()) {} in ITBlockScope()
433 bool InITBlock() const { return it_block_.InITBlock(); } in InITBlock() function
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| D | disasm-aarch32.cc | 7066 if (InITBlock()) { in DecodeT32()
7089 if (InITBlock()) { in DecodeT32()
7112 if (InITBlock()) { in DecodeT32()
7127 if (InITBlock()) { in DecodeT32()
7146 InITBlock()) { in DecodeT32()
7156 !InITBlock()) { in DecodeT32()
7166 ((instr & 0x07c00000) != 0x00000000) && InITBlock()) { in DecodeT32()
7175 ((instr & 0x07c00000) != 0x00000000) && !InITBlock()) { in DecodeT32()
7184 InITBlock()) { in DecodeT32()
7194 !InITBlock()) { in DecodeT32()
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| D | assembler-aarch32.cc | 1835 if (InITBlock() && !size.IsWide() && rd.Is(rn) && rn.IsLow() && in adc()
1994 if (InITBlock() && !size.IsWide() && rd.IsLow() && rn.IsLow() && in add()
2001 if (InITBlock() && !size.IsWide() && rd.Is(rn) && rn.IsLow() && in add()
2096 if (InITBlock() && !size.IsWide() && rd.IsLow() && rn.IsLow() && in add()
2198 if (InITBlock() && rd.IsLow() && (imm <= 255)) { in add()
2209 if (InITBlock() && !rm.Is(sp) && in add()
2564 if (InITBlock() && !size.IsWide() && rd.Is(rn) && rn.IsLow() && in and_()
2707 if (InITBlock() && !size.IsWide() && rd.IsLow() && rm.IsLow() && in asr()
2737 if (InITBlock() && !size.IsWide() && rd.Is(rm) && rm.IsLow() && in asr()
3061 if (InITBlock() && !size.IsWide() && rd.Is(rn) && rn.IsLow() && in bic()
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| D | macro-assembler-aarch32.cc | 535 VIXL_ASSERT(!InITBlock()); in PadToMinimumBranchRange()
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| D | assembler-aarch32.h | 179 bool InITBlock() { return it_mask_ != 0; } in InITBlock() function
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 565 static void AddThumb1SBit(MCInst &MI, bool InITBlock) { in AddThumb1SBit() argument
573 MI.insert(I, MCOperand::CreateReg(InITBlock ? 0 : ARM::CPSR)); in AddThumb1SBit()
578 MI.insert(I, MCOperand::CreateReg(InITBlock ? 0 : ARM::CPSR)); in AddThumb1SBit()
718 bool InITBlock = !ITBlock.empty(); in getInstruction() local
720 AddThumb1SBit(MI, InITBlock); in getInstruction()
775 bool InITBlock = ITBlock.size(); in getInstruction() local
777 AddThumb1SBit(MI, InITBlock); in getInstruction()
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| /external/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 573 static void AddThumb1SBit(MCInst &MI, bool InITBlock) { in AddThumb1SBit() argument
581 MI.insert(I, MCOperand::createReg(InITBlock ? 0 : ARM::CPSR)); in AddThumb1SBit()
586 MI.insert(I, MCOperand::createReg(InITBlock ? 0 : ARM::CPSR)); in AddThumb1SBit()
727 bool InITBlock = ITBlock.instrInITBlock(); in getInstruction() local
729 AddThumb1SBit(MI, InITBlock); in getInstruction()
770 bool InITBlock = ITBlock.instrInITBlock(); in getInstruction() local
772 AddThumb1SBit(MI, InITBlock); in getInstruction()
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