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Searched refs:InpR1 (Results 1 – 1 of 1) sorted by relevance

/external/llvm/lib/Target/Hexagon/
DHexagonBitSimplify.cpp2341 bool isSameShuffle(unsigned OutR1, unsigned InpR1, unsigned OutR2,
2453 bool HexagonLoopRescheduling::isSameShuffle(unsigned OutR1, unsigned InpR1, in isSameShuffle() argument
2455 if (!BTP->has(OutR1) || !BTP->has(InpR1) || !BTP->has(OutR2)) in isSameShuffle()
2471 if (V1.RefI.Reg != InpR1) in isSameShuffle()