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Searched refs:InstrMapping (Results 1 – 16 of 16) sorted by relevance

/external/llvm/lib/Target/Hexagon/
DHexagon.td80 def getPredOpcode : InstrMapping {
96 def getFalsePredOpcode : InstrMapping {
108 def getTruePredOpcode : InstrMapping {
120 def getPredNewOpcode : InstrMapping {
132 def getPredOldOpcode : InstrMapping {
144 def getNewValueOpcode : InstrMapping {
156 def getNonNVStore : InstrMapping {
164 def getBaseWithImmOffset : InstrMapping {
173 def getAbsoluteForm : InstrMapping {
182 def getBaseWithRegOffset : InstrMapping {
[all …]
/external/llvm/include/llvm/CodeGen/GlobalISel/
DRegisterBankInfo.h204 const InstructionMapping &InstrMapping; variable
231 OperandsMapper(MachineInstr &MI, const InstructionMapping &InstrMapping,
240 const InstructionMapping &getInstrMapping() const { return InstrMapping; } in getInstrMapping()
590 const RegisterBankInfo::InstructionMapping &InstrMapping) {
591 InstrMapping.print(OS);
DRegBankSelect.h554 const RegisterBankInfo::InstructionMapping &InstrMapping,
574 const RegisterBankInfo::InstructionMapping &InstrMapping,
/external/llvm/docs/
DHowToUseInstrMappings.rst21 ``InstrMapping`` Class Overview
25 models are described using ``InstrMapping`` class as a base. Each model sets
26 various fields of the ``InstrMapping`` class such that they can uniquely
31 is the definition of ``InstrMapping`` class definied in Target.td file:
35 class InstrMapping {
68 non-predicated form by assigning appropriate values to the ``InstrMapping``
74 def getPredOpcode : InstrMapping {
DWritingAnLLVMBackend.rst1023 using ``InstrMapping`` class as a base. TableGen parses all the models
/external/llvm/lib/CodeGen/GlobalISel/
DRegBankSelect.cpp346 MachineInstr &MI, const RegisterBankInfo::InstructionMapping &InstrMapping, in computeMapping() argument
353 bool Saturated = Cost.addLocalCost(InstrMapping.getCost()); in computeMapping()
356 DEBUG(dbgs() << "With: " << InstrMapping << '\n'); in computeMapping()
375 InstrMapping.getOperandMapping(OpIdx); in computeMapping()
470 MachineInstr &MI, const RegisterBankInfo::InstructionMapping &InstrMapping, in applyMapping() argument
473 RegisterBankInfo::OperandsMapper OpdMapper(MI, InstrMapping, *MRI); in applyMapping()
485 InstrMapping.getOperandMapping(OpIdx); in applyMapping()
DRegisterBankInfo.cpp514 MachineInstr &MI, const InstructionMapping &InstrMapping, in OperandsMapper() argument
516 : MRI(MRI), MI(MI), InstrMapping(InstrMapping) { in OperandsMapper()
521 assert(InstrMapping.verify(MI) && "Invalid mapping for MI"); in OperandsMapper()
/external/llvm/lib/Target/PowerPC/
DPPC.td232 def getRecordFormOpcode : InstrMapping {
245 def getNonRecordFormOpcode : InstrMapping {
258 def getAltVSXFMAOpcode : InstrMapping {
/external/llvm/lib/Target/Mips/
DMipsDSPInstrFormats.td12 def Dsp2MicroMips : InstrMapping {
DMipsInstrFormats.td41 def Std2MicroMips : InstrMapping {
55 def Std2MicroMipsR6 : InstrMapping {
DMips32r6InstrFormats.td16 def MipsR62MicroMipsR6 : InstrMapping {
/external/llvm/lib/Target/AMDGPU/
DSIInstrInfo.td3597 def getVOPe64 : InstrMapping {
3606 def getVOPe32 : InstrMapping {
3614 def getMaskedMIMGOp : InstrMapping {
3623 def getCommuteOrig : InstrMapping {
3632 def getCommuteRev : InstrMapping {
3640 def getCommuteCmpOrig : InstrMapping {
3649 def getCommuteCmpRev : InstrMapping {
3658 def getMCOpcodeGen : InstrMapping {
3667 def getAddr64Inst : InstrMapping {
3676 def getAtomicRetOp : InstrMapping {
[all …]
DR600Instructions.td1727 def getLDSNoRetOp : InstrMapping {
/external/llvm/include/llvm/Target/
DTarget.td1245 // InstrMapping - This class is used to create mapping tables to relate
1249 class InstrMapping {
1251 // define the relationship modeled by this InstrMapping record.
/external/llvm/lib/Target/SystemZ/
DSystemZInstrFormats.td103 def getDisp12Opcode : InstrMapping {
112 def getDisp20Opcode : InstrMapping {
121 def getMemOpcode : InstrMapping {
130 def getThreeOperandOpcode : InstrMapping {
/external/llvm/lib/Target/Lanai/
DLanaiInstrInfo.td264 def splsIdempotent : InstrMapping {