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Searched refs:IntOp (Results 1 – 6 of 6) sorted by relevance

/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMInstrNEON.td1831 ValueType ResTy, ValueType OpTy, Intrinsic IntOp>
1834 [(set DPR:$Vd, (ResTy (IntOp (OpTy DPR:$Vm))))]>;
1838 ValueType ResTy, ValueType OpTy, Intrinsic IntOp>
1841 [(set QPR:$Vd, (ResTy (IntOp (OpTy QPR:$Vm))))]>;
1856 ValueType TyD, ValueType TyQ, Intrinsic IntOp>
1859 [(set DPR:$Vd, (TyD (IntOp (TyQ QPR:$Vm))))]>;
1874 ValueType TyQ, ValueType TyD, Intrinsic IntOp>
1877 [(set QPR:$Vd, (TyQ (IntOp (TyD DPR:$Vm))))]>;
1980 ValueType ResTy, ValueType OpTy, Intrinsic IntOp, bit Commutable>
1984 [(set DPR:$Vd, (ResTy (IntOp (OpTy DPR:$Vn), (OpTy DPR:$Vm))))]> {
[all …]
/external/llvm/lib/Target/ARM/
DARMInstrNEON.td2450 ValueType ResTy, ValueType OpTy, SDPatternOperator IntOp>
2453 [(set DPR:$Vd, (ResTy (IntOp (OpTy DPR:$Vm))))]>;
2457 ValueType ResTy, ValueType OpTy, SDPatternOperator IntOp>
2460 [(set QPR:$Vd, (ResTy (IntOp (OpTy QPR:$Vm))))]>;
2465 ValueType ResTy, ValueType OpTy, SDPatternOperator IntOp>
2468 [(set DPR:$Vd, (ResTy (IntOp (OpTy DPR:$Vm))))]>;
2472 ValueType ResTy, ValueType OpTy, SDPatternOperator IntOp>
2475 [(set QPR:$Vd, (ResTy (IntOp (OpTy QPR:$Vm))))]>;
2480 ValueType ResTy, ValueType OpTy, SDPatternOperator IntOp>
2483 [(set QPR:$Vd, (ResTy (IntOp (OpTy QPR:$Vm))))]>;
[all …]
/external/vulkan-validation-layers/windowsRuntimeInstaller/
DInstallerRT.nsi132 IntOp $R3 $R3 + 1 ;move offset by 1 to check the next character
136 IntOp $R8 $R3 + $R4
140 IntOp $R3 $R3 + $R9 ;move offset by length of the replacement string
350 IntOp $1 $1 + 1
364 IntOp $1 $IC - 1
402 IntOp $1 $IC - 1
539 IntOp $1 $IC - 1
544 IntOp $1 $IC - 1
559 IntOp $IC $IC - 1
565 IntOp $IC $IC - 1
/external/llvm/lib/Target/NVPTX/
DNVPTXIntrinsics.td69 multiclass SHFL<NVPTXRegClass regclass, string mode, Intrinsic IntOp> {
78 [(set regclass:$dst, (IntOp regclass:$src, Int32Regs:$offset, Int32Regs:$mask))]>;
84 [(set regclass:$dst, (IntOp regclass:$src, imm:$offset, Int32Regs:$mask))]>;
90 [(set regclass:$dst, (IntOp regclass:$src, Int32Regs:$offset, imm:$mask))]>;
96 [(set regclass:$dst, (IntOp regclass:$src, imm:$offset, imm:$mask))]>;
882 string SpaceStr, string TypeStr, string OpcStr, PatFrag IntOp,
890 [(set regclass:$dst, (IntOp ptrclass:$addr, regclass:$b))]>,
898 [(set regclass:$dst, (IntOp ptrclass:$addr, IMM:$b))]>,
902 string OpcStr, PatFrag IntOp, Operand IMMType, SDNode IMM, Predicate Pred> {
904 IntOp, IMMType, IMM, Pred>;
[all …]
/external/llvm/lib/Target/AArch64/
DAArch64InstrFormats.td5233 Intrinsic IntOp> {
5237 [(set (v8i8 V64:$Rd), (IntOp (v8i16 V128:$Rn), (v8i16 V128:$Rm)))]>;
5245 [(set (v4i16 V64:$Rd), (IntOp (v4i32 V128:$Rn), (v4i32 V128:$Rm)))]>;
5253 [(set (v2i32 V64:$Rd), (IntOp (v2i64 V128:$Rn), (v2i64 V128:$Rm)))]>;
5262 def : Pat<(concat_vectors (v8i8 V64:$Rd), (IntOp (v8i16 V128:$Rn),
5267 def : Pat<(concat_vectors (v4i16 V64:$Rd), (IntOp (v4i32 V128:$Rn),
5272 def : Pat<(concat_vectors (v2i32 V64:$Rd), (IntOp (v2i64 V128:$Rn),
5280 Intrinsic IntOp> {
5284 [(set (v8i16 V128:$Rd), (IntOp (v8i8 V64:$Rn), (v8i8 V64:$Rm)))]>;
5297 def : Pat<(v8i16 (IntOp (v8i8 (extract_high_v16i8 V128:$Rn)),
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp29796 SDValue IntOp = DAG.getNode(IntOpcode, dl, IntVT, Op0, Op1); in lowerX86FPLogicOp() local
29797 return DAG.getBitcast(VT, IntOp); in lowerX86FPLogicOp()